XCV405E-7BG560C Xilinx Inc, XCV405E-7BG560C Datasheet - Page 44
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XCV405E-7BG560C
Manufacturer Part Number
XCV405E-7BG560C
Description
IC FPGA 1.8V C-TEMP 560-MBGA
Manufacturer
Xilinx Inc
Series
Virtex™-E EMr
Datasheet
1.XCV405E-6FG676C.pdf
(118 pages)
Specifications of XCV405E-7BG560C
Number Of Logic Elements/cells
10800
Number Of Labs/clbs
2400
Total Ram Bits
573440
Number Of I /o
404
Number Of Gates
129600
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
560-LBGA, Metal
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCV405E-7BG560C
Manufacturer:
XilinxInc
Quantity:
3 000
Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
Application Examples
Creating a design with the SelectI/O features requires the
instantiation of the desired library symbol within the design
code. At the board level, designers need to know the termi-
nation techniques required for each I/O standard.
This section describes some common application examples
illustrating the termination techniques recommended by
each of the standards supported by the SelectI/O features.
Termination Examples
Circuit examples involving typical termination techniques for
each of the SelectI/O standards follow. For a full range of
accepted values for the DC voltage specifications for each
standard, refer to the table associated with each figure.
The resistors used in each termination technique example
and the transmission lines depicted represent board level
components and are not meant to represent components
on the device.
GTL
A sample circuit illustrating a valid termination technique for
GTL is shown in
fications.
Module 2 of 4
40
V
GTL
CCO
Figure 44: Terminated GTL
= N/A
Figure
50Ω
V
TT
44.
= 1.2V
Table 23
V
REF
= 0.8V
Z = 50
50Ω
V
TT
lists DC voltage speci-
= 1.2V
x133_08_111699
www.xilinx.com
1-800-255-7778
Table 23:
GTL+
A sample circuit illustrating a valid termination technique for
GTL+ appears in
appear in
Table 24:
V
V
V
V
V
V
V
I
I
I
V
V
V
V
V
V
V
I
I
I
OH
OL
OL
OH
OL
OL
OH
OL
OH
OL
CCO
REF
TT
IH
IL
CCO
REF
TT
IH
IL
at V
at V
at V
at V
Note: N must be greater than or equal to 0.653 and less than
or equal to 0.68.
Note: N must be greater than or equal to 0.653 and less than
or equal to 0.68.
= V
= V
= V
at V
= V
at V
= N × V
= N × V
Parameter
REF
OL
OL
REF
OL
OL
REF
REF
Parameter
OH
OH
Table
(mA) at 0.4V
(mA) at 0.2V
(mA) at 0.6V
(mA) at 0.3V
V
(mA)
GTL+ Voltage Specifications
GTL Voltage Specifications
– 0.05
– 0.1
(mA)
CCO
+ 0.05
+ 0.1
TT
Figure 45: Terminated GTL+
TT
24.
1
1
= N/A
50Ω
V
Figure
TT
V
= 1.5V
REF
DS025-2 (v2.3) November 19, 2002
45. DC voltage specifications
GTL+
Z = 50
0.88
1.35
0.98
Min
= 1.0V
0.3
36
-
-
-
-
-
0.74
1.14
0.79
50Ω
Min
V
32
-
-
-
-
-
-
TT
= 1.5V
x133_09_012400
0.45
Typ
1.0
1.5
1.1
0.9
-
-
-
-
-
0.85
0.75
Typ
N/A
0.8
1.2
0.2
-
-
-
-
Max
1.12
1.65
1.02
0.6
Max
0.86
1.26
0.81
48
0.4
40
-
-
-
-
-
-
-
-
-
-
R