XC5VLX50-2FF676C Xilinx Inc, XC5VLX50-2FF676C Datasheet - Page 83
![IC FPGA VIRTEX-5 50K 676FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50-2FF676C
Manufacturer Part Number
XC5VLX50-2FF676C
Description
IC FPGA VIRTEX-5 50K 676FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50-2FF676C
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
1769472
Number Of I /o
440
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Manufacturer
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Price
- XC5VLX30-1FFG324C PDF datasheet
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- XC5VLX30-1FFG324C PDF datasheet #3
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- Download datasheet (14Mb)
VHDL and Verilog Templates, and the Clocking Wizard
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
X-Ref Target - Figure 2-16
VHDL and Verilog instantiation templates are available in the Libraries Guide for all
primitives. In addition, VHDL and Verilog files are generated by the Clocking Wizard in
the ISE software. The Clocking Wizard sets appropriate DCM attributes, input/output
clocks, and buffers for general use cases.
IBUFG
IBUFG
Figure 2-16: Two DCMs Driving a PLL
www.xilinx.com
VHDL and Verilog Templates, and the Clocking Wizard
CLKIN1
CLKIN2
CLKFBIN
RST
CLKIN
CLKFBIN
CLKIN
CLKFBIN
RST
DCM1
DCM
PLL
CLKFBOUT
CLKFX180
CLKFX180
CLK2X180
CLK2X180
CLKOUT0
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLK180
CLK270
CLK180
CLK270
CLKDV
CLKDV
CLKFX
CLKFX
CLK2X
CLK2X
CLK90
CLK90
CLK0
CLK0
BUFG
BUFG
BUFG
BUFG
BUFG
ug190_2_18_040906
83
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