XCV300-4PQ240C Xilinx Inc, XCV300-4PQ240C Datasheet - Page 33
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XCV300-4PQ240C
Manufacturer Part Number
XCV300-4PQ240C
Description
IC FPGA 2.5V C-TEMP 240-PQFP
Manufacturer
Xilinx Inc
Series
Virtex™r
Datasheet
1.XCV100-5PQ240C.pdf
(76 pages)
Specifications of XCV300-4PQ240C
Number Of Logic Elements/cells
6912
Number Of Labs/clbs
1536
Total Ram Bits
65536
Number Of I /o
166
Number Of Gates
322970
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP
Case
QFP240
Dc
02+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCV300-4PQ240C
Manufacturer:
XilinxInc
Quantity:
3 000
Part Number:
XCV300-4PQ240C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
IOB Output Switching Characteristics Standard Adjustments
Output delays terminating at a pad are specified for LVTTL with 12 mA drive and fast slew rate. For other standards, adjust
the delays by the values shown.
DS003-3 (v3.2) September 10, 2002
Production Product Specification
Notes:
1.
Output Delay Adjustments
Standard-specific adjustments for
output delays terminating at pads
(based on standard capacitive load,
Csl)
Output timing is measured at 1.4 V with 35 pF external capacitive load for LVTTL. For other I/O standards and different loads, see
Table 2
and
R
Description
Table
3.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OLVTTL_S12
OLVTTL_S16
OLVTTL_S24
OLVTTL_F12
OLVTTL_F16
OLVTTL_F24
T
OLVTTL_S2
OLVTTL_S4
OLVTTL_S6
OLVTTL_S8
OLVCMOS2
OLVTTL_F2
OLVTTL_F4
OLVTTL_F6
OLVTTL_F8
Symbol
T
OHSTL_IV
OSSLT2_II
OSSTL3_II
OHSTL_III
OPCI33_3
OPCI33_5
OPCI66_3
OSSTL2_I
OSSTL3_I
T
T
OHSTL_I
T
OGTLP
OAGP
OGTL
OCTT
www.xilinx.com
1-800-255-7778
PCI, 33 MHz, 3.3 V
PCI, 33 MHz, 5.0 V
PCI, 66 MHz, 3.3 V
LVTTL, Slow, 2 mA
LVTTL, Fast, 2mA
Standard
LVCMOS2
SSTL2 II
SSTL3 II
HSTL III
HSTL IV
SSTL2 I
SSTL3 I
HSTL I
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
GTL+
4 mA
6 mA
8 mA
4 mA
6 mA
8 mA
AGP
GTL
CTT
(1)
Virtex™ 2.5 V Field Programmable Gate Arrays
–0.10
–0.10
–0.10
–0.20
–0.10
–0.20
–0.20
–0.30
0.10
0.50
0.40
0.10
0.10
Min
4.2
2.5
1.8
1.2
1.0
0.9
0.8
1.9
0.7
0.2
0.1
0.6
0.7
0
0
0
–0.05
–0.20
–0.40
–0.50
–0.50
–0.50
14.7
13.1
0.10
0.50
–0.9
–1.0
–0.9
–1.0
–0.6
–0.9
Speed Grade
7.5
4.8
3.0
1.9
1.7
1.3
5.3
3.1
1.0
2.3
2.8
0.8
-6
0
–0.05
–0.21
–0.42
–0.53
–0.53
–0.53
15.8
14.0
0.11
0.54
–0.9
–1.0
–0.9
–1.0
–0.6
–0.9
8.0
5.1
3.3
2.1
1.9
1.4
5.7
3.3
1.1
2.5
3.0
0.9
-5
0
–0.05
–0.23
–0.46
17.0
15.1
0.12
–0.5
–1.0
–1.1
–0.5
–1.0
–0.5
–1.1
–0.6
–1.0
8.6
5.6
3.5
2.2
2.0
1.6
6.1
3.6
1.2
2.7
3.3
0.6
1.0
-4
0
Module 3 of 4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
9