XC3S1500-4FGG676I Xilinx Inc, XC3S1500-4FGG676I Datasheet - Page 29
![SPARTAN-3A FPGA 1.5M STD 676FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3S1500-4FGG676I
Manufacturer Part Number
XC3S1500-4FGG676I
Description
SPARTAN-3A FPGA 1.5M STD 676FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S1500-4FGG676I
Number Of Logic Elements/cells
29952
Number Of Labs/clbs
3328
Total Ram Bits
589824
Number Of I /o
487
Number Of Gates
1500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
676-BBGA
For Use With
NANO-SPARTAN - KIT NANOBOARD AND SPARTAN3 DC807-1001 - DAUGHTER CARD XILINX SPARTAN 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Choosing the READ_FIRST attribute, data already stored in
the addressed location pass to the DO outputs before that
location is overwritten with new data from the DI inputs on
Choosing a third attribute called NO_CHANGE puts the DO
outputs in a latched state when asserting WE. Under this
condition, the DO outputs will retain the data driven just
DS099-2 (v2.5) December 4, 2009
Product Specification
R
Figure 13: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
Figure 14: Waveforms of Block RAM Data Operations with READ_FIRST Selected
ADDR
ADDR
CLK
CLK
WE
WE
DO
DO
EN
EN
DI
DI
DISABLED
DISABLED
0000
0000
XXXX
XXXX
aa
aa
READ
READ
MEM(aa)
MEM(aa)
www.xilinx.com
1111
bb
MEM(bb)=1111
1111
bb
MEM(bb)=1111
WRITE
WRITE
old MEM(bb)
an enabled active CLK edge. READ_FIRST timing is shown
in the portion of
before WE was asserted. NO_CHANGE timing is shown in
the portion of
1111
Spartan-3 FPGA Family: Functional Description
2222
cc
2222
cc
MEM(cc)=2222
MEM(cc)=2222
WRITE
WRITE
old MEM(cc)
Figure 15
2222
Figure 14
during which WE is High.
dd
dd
DS099-2_14_030403
DS099-2_15_030403
during which WE is High.
XXXX
XXXX
READ
READ
MEM(dd)
MEM(dd)
29
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