XCS40-3PQ208I Xilinx Inc, XCS40-3PQ208I Datasheet - Page 48

IC FPGA 5V I-TEMP 208-PQFP

XCS40-3PQ208I

Manufacturer Part Number
XCS40-3PQ208I
Description
IC FPGA 5V I-TEMP 208-PQFP
Manufacturer
Xilinx Inc
Series
Spartan™r
Datasheet

Specifications of XCS40-3PQ208I

Number Of Logic Elements/cells
1862
Number Of Labs/clbs
784
Total Ram Bits
25088
Number Of I /o
169
Number Of Gates
40000
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Spartan and Spartan-XL FPGA Families Data Sheet
Capacitive Load Factor
Figure 33
and load capacitance. It allows a user to adjust the specified
output delay if the load capacitance is different than 50 pF.
For example, if the actual load capacitance is 120 pF, add
2.5 ns to the specified delay. If the load capacitance is 20
pF, subtract 0.8 ns from the specified output delay.
Figure 33
of voltage and temperature and is independent of the output
slew rate control.
48
shows the relationship between I/O output delay
is usable over the specified operating conditions
www.xilinx.com
Figure 34: Delay Factor at Various Capacitive Loads
-1
-2
3
2
1
0
0
20
40
Capacitance (pF)
60
DS060 (v1.8) June 26, 2008
80
Product Specification
100
DS060_35_080400
120
140
R

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