XC3S200-5VQG100C Xilinx Inc, XC3S200-5VQG100C Datasheet - Page 160
![SPARTAN-3A FPGA 200K 100-VQFP](/photos/6/70/67082/100-tqfp_sml.jpg)
XC3S200-5VQG100C
Manufacturer Part Number
XC3S200-5VQG100C
Description
SPARTAN-3A FPGA 200K 100-VQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S200-5VQG100C
Number Of Logic Elements/cells
4320
Number Of Labs/clbs
480
Total Ram Bits
221184
Number Of I /o
63
Number Of Gates
200000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S200-5VQG100C
Manufacturer:
MAXIM
Quantity:
101
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Spartan-3 FPGA Family: Pinout Descriptions
160
FG456 Footprint
Left Half of FG456
Package (top view)
XC3S400
(264 max. user I/O)
XC3S1000, XC3S1500, XC3S2000
(333 max user I/O)
All devices
196
261
32
69
36
12
16
12
40
52
0
8
7
4
8
I/O: Unrestricted,
general-purpose user I/O
VREF: User I/O or input
voltage reference for bank
N.C.: Unconnected pins for
XC3S400 ( )
I/O: Unrestricted,
general-purpose user I/O
VREF: User I/O or input
voltage reference for bank
N.C.: No unconnected pins
in this package
DUAL: Configuration pin,
then possible user I/O
GCLK: User I/O or global
clock buffer input
DCI: User I/O or reference
resistor input for bank
CONFIG: Dedicated
configuration pins
JTAG: Dedicated JTAG
port pins
VCCINT: Internal core
voltage supply (+1.2V)
VCCO: Output voltage
supply for bank
VCCAUX: Auxiliary voltage
supply (+2.5V)
GND: Ground
Figure 48: FG456 Package Footprint (top view)
M
W
A
B
C
D
E
G
H
K
N
P
R
U
V
Y
A
A
A
B
F
J
L
T
VREF_7
VREF_7
VREF_6
VREF_6
VCCAUX
L40N_7
VCCAUX
L40P_6
L16P_7
L16N_7
L21N_7
L27N_7
L28N_7
L32N_7
L35N_7
L35P_6
L32P_6
L29P_6
L27P_6
L21P_6
L17P_6
GND
www.xilinx.com
GND
TDI
M1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
PROG_B
VREF_7
L28P_7
L35P_7
L40P_7
L24P_6
L01P_6
L23N_7
L40N_6
L35N_6
L32N_6
L29N_6
L27N_6
L21N_6
L17N_6
L19P_7
L21P_7
L27P_7
L32P_7
VRN_6
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M0
2
VREF_0
VREF_7
VREF_6
HSWAP_
L34N_7
L39N_7
L01N_6
VCCO_6
L01N_7
L19N_7
L20P_7
L23P_7
L39P_6
L34P_6
L26N_6
L24N_6
L20P_6
L16P_6
VRP_6
L01P_5
VRP_7
VCCO_7
L26N_7
CS_B
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M2
EN
IO
3
VREF_6
RDWR_B
L29N_7
L39P_7
L34N_6
L23P_6
L23N_6
L20N_6
L16N_6
L01P_0
L01N_0
L01P_7
L17P_7
L17N_7
L20N_7
L26P_7
L29P_7
L34P_7
L39N_6
L31P_6
L26P_6
L01N_5
L06P_5
L06N_5
VRN_0
VRN_7
VRP_0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
VREF_0
L24N_7
L33N_7
L38N_7
L31N_6
L19P_6
L19N_6
L10N_5
VRN_5
VRP_5
L09P_0
L09N_0
L06P_0
L06N_0
L22P_7
L24P_7
L31N_7
L38P_6
L33P_6
L28N_6
L22P_6
L09P_5
L09N_5
L10P_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
5
VREF_5
VCCAUX
L15N_0
L22N_7
L22N_6
L15N_5
L16N_5
VCCAUX
L28P_6
VCCO_6
L15P_0
L10P_0
L10N_0
L31P_7
L33P_7
L38P_7
L38N_6
L33N_6
L15P_5
L16P_5
VCCO_7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
6
Bank 0
VREF_0
VREF_0
VREF_5
VCCINT VCCINT
VCCINT
VCCINT
VCCINT VCCINT
L19P_5
L19N_5
L22P_5
L22N_5
L19N_0
L16N_0
VCCO_7
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VCCO_6
L19P_0
L16P_0
DS099-4 (v2.5) December 4, 2009
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
IO
7
Bank 5
VCCO_5
L24P_5
L24N_5
L25N_5
VCCO_0
VCCO_0
VCCO_5
L24P_0
L24N_0
L22P_0
L22N_0
L25P_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
Product Specification
VREF_5
VCCO_5 VCCO_5 VCCO_5
L27N_5
L27P_0
L27N_0
L25P_0
L25N_0
L27P_5
L28P_5
L28N_5
VCCO_0 VCCO_0 VCCO_0
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
D6
9
VREF_5
L29N_5
L30P_5
L30N_5
L29P_0
L29N_0
L28P_0
L28N_0
L29P_5
GND
GND
GND
GND
GND
GND
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DS099-4_11a_030203
VREF_0
VREF_5
L31N_0
L31N_5
L32N_5
L31P_5
L32P_5
GCLK2
GCLK3
L32P_0
L32N_0
L31P_0
L30P_0
L30N_0
GCLK6
GCLK7
GND
GND
GND
GND
GND
GND
11
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D5
D4
IO
R
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