EP4SE530H35C3 Altera, EP4SE530H35C3 Datasheet - Page 322

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EP4SE530H35C3

Manufacturer Part Number
EP4SE530H35C3
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H35C3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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8–44
Stratix IV Device Handbook Volume 1
Figure 8–35. Invalid Placement of DPA-Disabled Differential I/Os Due to Interleaving of Channels
Driven by the Corner and Center Left and Right PLLs
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
Corner Left/Right
Center Left/Right
Reference CLK
Reference CLK
DPA-disabled
DPA-disabled
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
PLL
PLL
Differential Pin Placement Guidelines
February 2011 Altera Corporation

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