EP1S40F1508C5N Altera, EP1S40F1508C5N Datasheet - Page 71

IC STRATIX FPGA 40K LE 1508-FBGA

EP1S40F1508C5N

Manufacturer Part Number
EP1S40F1508C5N
Description
IC STRATIX FPGA 40K LE 1508-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40F1508C5N

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
822
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Figure 2–32. Multiplier Sub-Block within Stratix DSP Block
Note to
(1)
Altera Corporation
July 2005
These signals can be unregistered or registered once to match data path pipelines if required.
Figure
Data B
Data A
2–32:
shiftout B
shiftin B
shiftout A
The DSP block consists of the following elements:
Multiplier Block
The DSP block multiplier block consists of the input registers, a
multiplier, and pipeline register for pipelining multiply-accumulate and
multiply-add/subtract functions as shown in
ENA
ENA
D
D
Multiplier block
Adder/output block
CLRN
CLRN
clock[3..0]
sign_a (1)
sign_b (1)
shiftin A
aclr[3..0]
ena[3..0]
Q
Q
ENA
D
CLRN
Q
Stratix Device Handbook, Volume 1
Figure
Optional
Multiply-Accumulate
and Multiply-Add
Pipeline
Result
to Adder
blocks
2–32.
Stratix Architecture
2–57

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