EP1SGX25FF1020C5 Altera, EP1SGX25FF1020C5 Datasheet - Page 59

• Manufacturer Part Number: EP1SGX25FF1020C5
• Description: IC STRATIX GX FPGA 25K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX25FF1020C5

• Number Of Logic Elements/cells: 25660
• Number Of Labs/clbs: 2566
• Total Ram Bits: 1944576
• Number Of I /o: 607
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Family Name: Stratix GX
• Number Of Logic Blocks/elements: 25660
• # I/os (max): 607
• Frequency (max): 5GHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 25660
• Ram Bits: 1944576
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
August 2005
Figure 3–7. PLL & Channel Layout in EP1SGX40 Devices
Notes to
(1)
(2)
(3)
Corner PLLs do not support DPA.
Not all eight phases are used by the receiver channel or transmitter channel in
non-DPA mode.
The center PLLs can only clock 20 transceivers in either direction. Using Fast PLL2,
you can clock a total of 40 transceivers, 20 in each direction.
Figure
22 Rows
23 Rows
3–7:
1 Transmitter
1 Transmitter
1 Transmitter
1 Transmitter
1 Receiver
1 Receiver
1 Receiver
1 Receiver
INCLK0
INCLK1
CLKIN
CLKIN
Source-Synchronous Signaling With DPA
Stratix GX Device Handbook, Volume 1
PLL (1)
PLL (1)
PLL 1
PLL 2
Fast
Fast
8
8
Eight-Phase
Clock
Eight-Phase
Clock
Notes
(1), (2),
3–9
(3)