EP2AGX190EF29I5N Altera, EP2AGX190EF29I5N Datasheet - Page 64

• Manufacturer Part Number: EP2AGX190EF29I5N
• Description: IC ARRIA II GX FPGA 190K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190EF29I5N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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Table 1–41. Transceiver Block Jitter Specifications for Arria II GZ Devices
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Deterministic jitter at
3.0 Gbps (G2)
Total jitter at 6.0 Gbps (G3)
Random jitter at 6.0 Gbps
(G3)
SAS Receiver Jitter Tolerance
Total jitter tolerance at
1.5 Gbps (G1)
Deterministic jitter tolerance
at 1.5 Gbps (G1)
Sinusoidal jitter tolerance at
1.5 Gbps (G1)
CPRI Transmit Jitter Generation
Total jitter
Deterministic jitter
CPRI Receiver Jitter Tolerance
Total jitter tolerance
Deterministic jitter tolerance
Total jitter tolerance
Deterministic jitter tolerance
Combined deterministic and
random jitter tolerance
Description
Symbol/
E.6.LV, E.12.LV, E.24.LV,
E.6.LV, E.12.LV, E.24.LV,
E.6.LV, E.12.LV, E.24.LV,
E.6.LV, E.12.LV, E.24.LV,
E.6.LV, E.12.LV, E.24.LV,
(9)
Pattern = CJTPAT BER
(10)
(10)
900 KHz to 5 MHz
Jitter frequency =
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
Pattern = CJPAT
E.6.HV, E.12.HV
E.6.HV, E.12.HV
E.6.HV, E.12.HV
E.6.HV, E.12.HV
Conditions
= 1E-12
E.30.LV
E.30.LV
E.30.LV
E.30.LV
E.30.LV
Min
—
—
—
—
—
—
—
—
—
–C3 and –I3
Typ
> 0.66
> 0.65
> 0.37
> 0.55
—
—
—
—
—
> 0.1
—
—
—
—
> 0.4
(Note
0.279
Max
0.35
0.25
0.15
0.65
0.35
0.35
0.14
0.17
Chapter 1: Device Datasheet for Arria II Devices
1),
(2)
Min
—
—
—
—
—
—
—
—
—
(Part 7 of 8)
December 2010 Altera Corporation
–C4 and –I4
> 0.66
> 0.65
> 0.37
> 0.55
Typ
—
—
—
—
—
> 0.1
—
—
—
—
> 0.4
Switching Characteristics
0.279
0.35
0.25
0.15
0.65
0.35
0.35
0.14
0.17
Max
Unit
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI