EP1S10F484C5N Altera, EP1S10F484C5N Datasheet - Page 65
![IC STRATIX FPGA 10K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S10F484C5N
Manufacturer Part Number
EP1S10F484C5N
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S10F484C5N
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484C5N
Manufacturer:
ALTERA
Quantity:
3 000
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Figure 2–28. Single-Port Mode
Note to
(1)
Altera Corporation
July 2005
address[ ]
outclken
outclock
inclken
inclock
data[ ]
wren
Violating the setup or hold time on the address registers could corrupt the memory contents. This applies to both
read and write operations.
Figure
8 LAB Row
Clocks
8
2–28:
Single-Port Mode
The memory blocks also support single-port mode, used when
simultaneous reads and writes are not required. See
block in a memory block can support up to two single-port mode RAM
blocks in the M4K RAM blocks if each RAM block is less than or equal to
2K bits in size.
Note (1)
D
ENA
D
ENA
Q
Q
Generator
D
ENA
Pulse
Write
Q
Data In
Address
Write Enable
RAM/ROM
1,024 × 4
2,048 × 2
4,096 × 1
Data Out
256 × 16
512 × 8
Stratix Device Handbook, Volume 1
D
ENA
Q
Figure
Stratix Architecture
2–28. A single
To MultiTrack
Interconnect
2–51
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