EP2S15F484C3N Altera, EP2S15F484C3N Datasheet - Page 176
![IC STRATIX II FPGA 15K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2S15F484C3N
Manufacturer Part Number
EP2S15F484C3N
Description
IC STRATIX II FPGA 15K 484-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S15F484C3N
Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
342
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Type
Stratix II
No. Of I/o's
342
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Operating Temperature Range
0°C To +85°C
Logic Case Style
BGA
No. Of Pins
484
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1874
EP2S15F484C3N
EP2S15F484C3N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S15F484C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 176 of 238
- Download datasheet (3Mb)
Timing Model
5–40
Stratix II Device Handbook, Volume 1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
M E G A R C
M E G AW E R E S U
M E G AW E R E H
M E G A B E S U
M E G A B E H
M E G A D ATA A S U
M E G A D ATA A H
M E G A A D D R A S U
M E G A A D D R A H
M E G A D ATA B S U
M E G A D ATA B H
M E G A A D D R B S U
M E G A A D D R B H
M E G A D ATA C O 1
M E G A D ATA C O 2
M E G A C L K L
Table 5–42. M-RAM Block Internal Timing Microparameters (Part 1 of 2)
Symbol
Synchronous read cycle
time
Write or read enable
setup time before clock
Write or read enable
hold time after clock
Byte enable setup time
before clock
Byte enable hold time
after clock
A port data setup time
before clock
A port data hold time
after clock
A port address setup
time before clock
A port address hold time
after clock
B port setup time before
clock
B port hold time after
clock
B port address setup
time before clock
B port address hold time
after clock
Clock-to-output delay
when using output
registers
Clock-to-output delay
without output registers
Minimum clock low time 1,250
Parameter
1,866 2,774 1,866 2,911 1,777
1,950 2,899 1,950 3,042 1,857
Min
144
243
589
241
243
589
241
480
(4)
39
50
39
50
50
Grade
-3 Speed
Max
(2)
715
1,312
Min
151
255
618
253
255
618
253
480
(4)
40
52
40
52
52
Grade
-3 Speed
Max
(3)
749
1,866
1,950
1,437
1,437
Min
165
165
279
279
677
677
277
277
279
279
677
677
277
277
457
480
(5)
44
44
57
57
44
44
57
57
57
57
-4 Speed
Grade
Note (1)
3,189 1,777
3,332 1,950 3,884
Max
821
1,866
1,675
Altera Corporation
Min
192
325
789
322
325
789
322
480
(4)
52
67
52
67
67
-5 Speed
Grade
3,716
Max
957
April 2011
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Related parts for EP2S15F484C3N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-25T](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: