EP2S15F484C4 Altera, EP2S15F484C4 Datasheet - Page 29

• Manufacturer Part Number: EP2S15F484C4
• Description: IC STRATIX II FPGA 15K 484-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S15F484C4

• Number Of Logic Elements/cells: 15600
• Number Of Labs/clbs: 780
• Total Ram Bits: 419328
• Number Of I /o: 342
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix II
• Number Of Logic Blocks/elements: 15600
• # I/os (max): 342
• Frequency (max): 711.24MHz
• Process Technology: 90nm (CMOS)
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 15600
• Ram Bits: 419328
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1104

Figure 2–15. Register Chain within an LAB
Note to
(1)
Altera Corporation
May 2007
The combinational or adder logic can be utilized to implement an unrelated, un-registered function.
Figure
2–15:
Combinational
Combinational
Logic
Logic
See the
information on register chain interconnect.
“MultiTrack Interconnect” on page 2–22
adder0
adder1
adder0
adder1
Note (1)
reg_chain_out
reg_chain_in
Stratix II Device Handbook, Volume 1
D
D
D
D
reg0
reg1
reg0
reg1
From Previous ALM
Within The LAB
To Next ALM
within the LAB
Q
Q
Q
Q
section for more
To general or
To general or
To general or
To general or
To general or
To general or
To general or
To general or
local routing
local routing
local routing
local routing
local routing
local routing
local routing
local routing
Stratix II Architecture
2–21