EPF10K50VRC240-2N Altera, EPF10K50VRC240-2N Datasheet - Page 29
![IC FLEX 10KV FPGA 50K 240-RQFP](/photos/6/70/67070/544-240-rqfp_sml.jpg)
EPF10K50VRC240-2N
Manufacturer Part Number
EPF10K50VRC240-2N
Description
IC FLEX 10KV FPGA 50K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K50VRC240-2N
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
20480
Number Of I /o
189
Number Of Gates
116000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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FLEX 10K Embedded Programmable Logic Device Family Data Sheet
I/O Element
An I/O element (IOE) contains a bidirectional I/O buffer and a register
that can be used either as an input register for external data that requires
a fast setup time, or as an output register for data that requires fast clock-
to-output performance. In some cases, using an LE register for an input
register will result in a faster setup time than using an IOE register. IOEs
can be used as input, output, or bidirectional pins. For bidirectional
registered I/O implementation, the output register should be in the IOE
and, the data input and output enable register should be LE registers
placed adjacent to the bidirectional pin. The Compiler uses the
programmable inversion option to invert signals from the row and
column interconnect automatically where appropriate.
Figure 13
shows
the bidirectional I/O registers.
Altera Corporation
29
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