EP2C50F672C8 Altera, EP2C50F672C8 Datasheet - Page 73

IC CYCLONE II FPGA 50K 672-FBGA

EP2C50F672C8

Manufacturer Part Number
EP2C50F672C8
Description
IC CYCLONE II FPGA 50K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C50F672C8

Number Of Logic Elements/cells
50528
Number Of Labs/clbs
3158
Total Ram Bits
594432
Number Of I /o
450
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1444

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Altera Corporation
February 2007
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
Table 2–20. Cyclone II MultiVolt I/O Support (Part 2 of 2)
V
CCIO
3.3
The PCI clamping diode must be disabled to drive an input with voltages higher than V
These input values overdrive the input buffer, so the pin leakage current is slightly higher than the default value.
To drive inputs higher than V
overdrive for LVTTL/LVCMOS input pins option in Device setting option in the Quartus II software.
When V
When V
feeds an input pin, the V
that the input signal level does not drive to the V
When V
When V
(V)
Table
CCIO
CCIO
CCIO
CCIO
2–20:
1.5 V
= 1.8-V, a Cyclone II device can drive a 1.5-V device with 1.8-V tolerant inputs.
= 3.3-V and a 2.5-V input signal feeds an input pin or when V
= 2.5-V, a Cyclone II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
= 3.3-V, a Cyclone II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
1.8 V
CCIO
Input Signal
supply current will be slightly larger than expected. The reason for this increase is
CCIO
but less than 4.0 V, disable the PCI clamping diode and turn on Allow voltage
v
2.5 V
(4)
CCIO
3.3 V
v
rail, which causes the input buffer to not completely shut off.
v
Note (1)
1.5 V
(6)
Cyclone II Device Handbook, Volume 1
C C I O
v
1.8 V
Output Signal
= 1.8-V and a 1.5-V input signal
(6)
Cyclone II Architecture
CCIO
v
2.5 V
.
(6)
3.3 V
v
2–61

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