EP1K100FI256-2N Altera, EP1K100FI256-2N Datasheet - Page 38
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EP1K100FI256-2N
Manufacturer Part Number
EP1K100FI256-2N
Description
IC ACEX 1K FPGA 100K 256-FBGA
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K100FI256-2N
Number Of Logic Elements/cells
4992
Number Of Labs/clbs
624
Total Ram Bits
49152
Number Of I /o
186
Number Of Gates
257000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
256-FBGA
Family Name
ACEX™ 1K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4992
# I/os (max)
186
Frequency (max)
250MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
4992
Ram Bits
49152
Device System Gates
257000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
22
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
5 510
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
ACEX 1K Programmable Logic Device Family Data Sheet
38
t
t
t
f
f
f
t
t
t
t
R
F
INDUTY
CLK1
CLK2
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 11. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost clock
multiplication factor equals 1)
Input clock frequency (ClockBoost clock
multiplication factor equals 2)
Input deviation from user specification in the
Altera software
Input clock stability (measured between
adjacent clocks)
Time required for ClockLock or ClockBoost
to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or ClockBoost-
generated clock
(3)
(1)
Parameter
(4)
Tables 11
for -1 and -2 speed-grade devices, respectively.
and
12
summarize the ClockLock and ClockBoost parameters
t
t
INCLKSTB
INCLKSTB
Condition
<100
< 50
Min
40
25
16
40
Typ
50
Altera Corporation
250
200
25,000
Max
180
100
(2)
60
90
10
60
5
5
(4)
(4)
PPM
MHz
MHz
Unit
ns
ns
ps
ps
ps
%
%
s