EP1K30QI208-2N Altera, EP1K30QI208-2N Datasheet - Page 51
![IC ACEX 1K FPGA 30K 208-PQFP](/photos/6/70/67062/544-208-pqfp_sml.jpg)
EP1K30QI208-2N
Manufacturer Part Number
EP1K30QI208-2N
Description
IC ACEX 1K FPGA 30K 208-PQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K30QI208-2N
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
24576
Number Of I /o
147
Number Of Gates
119000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1K30QI208-2N
Manufacturer:
ALTERA
Quantity:
6
Part Number:
EP1K30QI208-2N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 24. ACEX 1K Device Timing Model
Figure 25. ACEX 1K Device LE Timing Model
Clock/Input
Dedicated
Control-In
Data-In
Carry-In
Figure 24
to and from the various elements of the ACEX 1K device.
Figures 25
and functions within the LE, IOE, EAB, and bidirectional timing models.
Packed Register
Register Control
Carry Chain
t
t
t
t
t
t
t
t
t
LUT Delay
PACKED
LUT
RLUT
CLUT
C
EN
CGEN
CGENR
CICO
shows the overall timing model, which maps the possible paths
Delay
Delay
Delay
through
t
Element
Cascade-In
LABCARRY
Carry-Out
Logic
ACEX 1K Programmable Logic Device Family Data Sheet
28
show the delays that correspond to various paths
Interconnect
Cascade-Out
t
LABCASC
t
CASC
Embedded Array
Block
Register
Delays
t
t
t
t
t
t
COMB
H
PRE
CLR
CO
SU
Data-Out
I/O Element
51
13