EP3C16F256C7N Altera, EP3C16F256C7N Datasheet - Page 135
EP3C16F256C7N
Manufacturer Part Number
EP3C16F256C7N
Description
IC CYCLONE III FPGA 16K 256FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C16F256C7N.pdf
(274 pages)
Specifications of EP3C16F256C7N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
168
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
168
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2463
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C16F256C7N
Manufacturer:
ALTERA
Quantity:
138
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Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Standards Support
Figure 7–6. RSDS, Mini-LVDS, or PPDS Interface with External Resistor Network on the Top and Bottom I/O
Banks
Note to
(1)
© December 2009
R
S
Figure
= 120
(Note 1)
Ω;
7–6:
R
1
P
Altera Corporation
= 170
Cyclone III Device Family
Emulated RSDS,
Mini-LVDS, or PPDS
Transmitter
Ω
Figure 7–6
output buffers and external resistors.
A resistor network is required to attenuate the output voltage swing to meet RSDS,
mini-LVDS, and PPDS specifications when using emulated transmitters. You can
modify the resistor network values to reduce power or improve the noise margin.
The resistor values chosen must satisfy
Equation 7–1.
Altera recommends that you perform simulations using Cyclone III device family IBIS
models to validate that custom resistor values meet the RSDS, mini-LVDS, or PPDS
requirements.
You can use a single external resistor instead of using three resistors in the resistor
network for an RSDS interface, as shown in
solution reduces the external resistor count while still achieving the required
signaling level for RSDS. However, the performance of the single-resistor solution is
lower than the performance with the three-resistor network.
R
------------------- -
R
S
S
×
+
R
----- -
R
----- -
2
2
P
P
=
50 Ω
shows a RSDS, mini-LVDS, or PPDS interface with two singled-ended
Resistor Network
R
R
S
S
R
P
50 Ω
50 Ω
Equation
Figure
100 Ω
7–1.
7–7. The external single-resistor
RSDS, Mini-LVDS,
or PPDS Receiver
Cyclone III Device Handbook, Volume 1
7–11
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