EP3C5E144C8N Altera, EP3C5E144C8N Datasheet - Page 47
![IC CYCLONE III FPGA 5K 144-EQFP](/photos/6/73/67363/ep3c5e144c8n_sml.jpg)
EP3C5E144C8N
Manufacturer Part Number
EP3C5E144C8N
Description
IC CYCLONE III FPGA 5K 144-EQFP
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C5E144C8N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
94
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-EQFP
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2431
EP3C5E144C8N
EP3C5E144C8N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5E144C8N
Manufacturer:
ALTERA55
Quantity:
52
Verification
Figure 8. Early Timing Estimate
© November 2008 Altera Corporation
f
f
Checking Design Timing
To ensure that your design works, check the timing report to ensure that there is no
timing violation. It is important that the internal and I/O timings are met. The f
from the timing report indicates the maximum frequency at which your design can
operate. To ensure that the Cyclone III device interfaces correctly with other devices
on the board, check the t
when the Cyclone III device receives data from another device, make sure that the t
and t
register. Violating t
Metastable output can become incorrect for short durations, thus affecting the design
functionality.
When the Cyclone III device transmits registered data to another device, check the t
of the Cyclone III device to estimate the data arrival time for the external device.
For more information about the TimeQuest Timing Analyzer and the Classic Timing
Analyzer, refer to the
Timing Analyzer
For more information about metastability, refer to
Devices.
H
are not violated when the data is being clocked into the Cyclone III device
chapters, respectively, in volume 3 of the Quartus II Handbook.
SU
or t
Quartus II TimeQuest Timing Analyzer
SU
H
, t
can cause the register output to become metastable.
CO
, t
H
, and t
PD
values from the timing report. For example,
AN 42: Metastability in Altera
and the
Quartus II Classic
MAX
Page 47
CO
SU