XCV100-5PQ240C Xilinx Inc, XCV100-5PQ240C Datasheet - Page 38
![IC FPGA 2.5V 108K GATES 240-PQFP](/photos/6/73/67353/xcv100-5pq240c_sml.jpg)
XCV100-5PQ240C
Manufacturer Part Number
XCV100-5PQ240C
Description
IC FPGA 2.5V 108K GATES 240-PQFP
Manufacturer
Xilinx Inc
Series
Virtex™r
Datasheet
1.XCV100-5PQ240C.pdf
(76 pages)
Specifications of XCV100-5PQ240C
Number Of Logic Elements/cells
2700
Number Of Labs/clbs
600
Total Ram Bits
40960
Number Of I /o
166
Number Of Gates
108904
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1214
XCV100-5PQ240C
XCV100-5PQ240C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Virtex™ 2.5 V Field Programmable Gate Arrays
CLB Arithmetic Switching Characteristics
Setup times not listed explicitly can be approximated by decreasing the combinatorial delays by the setup time adjustment
listed. Precise values are provided by the timing analyzer.
Module 3 of 4
14
Notes:
1.
Combinatorial Delays
F operand inputs to X via XOR
F operand input to XB output
F operand input to Y via XOR
F operand input to YB output
F operand input to COUT output
G operand inputs to Y via XOR
G operand input to YB output
G operand input to COUT output
BX initialization input to COUT
CIN input to X output via XOR
CIN input to XB
CIN input to Y via XOR
CIN input to YB
CIN input to COUT output
Multiplier Operation
F1/2 operand inputs to XB output via AND
F1/2 operand inputs to YB output via AND
F1/2 operand inputs to COUT output via AND
G1/2 operand inputs to YB output via AND
G1/2 operand inputs to COUT output via AND
Setup and Hold Times before/after Clock CLK
CIN input to FFX
CIN input to FFY
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
Description
(1)
T
T
CCKX
CCKY
www.xilinx.com
1-800-255-7778
T
T
T
T
Symbol
T
T
T
T
T
T
T
T
T
T
GANDCY
FANDCY
GANDYB
T
T
FANDXB
FANDYB
T
T
OPGYB
OPCYG
OPCYF
T
CINXB
CINYB
OPXB
OPYB
OPGY
BXCY
CINX
CINY
OPX
OPY
BYP
/T
/T
CKCX
CKCY
0.50 / 0
0.53 / 0
0.37
0.54
0.46
0.41
0.21
0.02
0.23
0.23
0.05
0.18
0.40
0.22
0.25
0.07
Min
0.8
0.8
0.6
0.8
0.7
Setup Time / Hold Time
1.0 / 0
1.1 / 0
0.41
0.04
0.46
0.45
0.09
0.36
0.43
0.50
0.13
0.8
1.1
1.5
1.5
1.2
1.0
1.6
1.3
0.9
0.8
Speed Grade
-6
DS003-3 (v3.2) September 10, 2002
Production Product Specification
1.2 / 0
1.2 / 0
0.46
0.05
0.52
0.51
0.10
0.40
0.48
0.15
0.9
1.3
1.7
1.7
1.3
1.1
1.8
1.4
1.0
0.9
0.6
-5
1.3 / 0
1.4 / 0
0.53
0.06
0.11
0.46
0.17
1.0
1.4
2.0
2.0
1.5
1.2
2.1
1.6
1.1
0.6
0.6
1.1
0.6
0.7
-4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
Units
R