EP2C70F672C8N Altera, EP2C70F672C8N Datasheet - Page 86

• Manufacturer Part Number: EP2C70F672C8N
• Description: IC CYCLONE II FPGA 70K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C70F672C8N

• Number Of Logic Elements/cells: 68416
• Number Of Labs/clbs: 4276
• Total Ram Bits: 1152000
• Number Of I /o: 422
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Logic Blocks: 4276
• Family Type: Cyclone II
• No. Of I/o's: 422
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 320MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 68416
• # I/os (max): 422
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 68416
• Ram Bits: 1152000
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• For Use With: P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1688

Hot-Socketing Feature Implementation in Cyclone II Devices
Figure 4–1. Hot-Socketing Circuit Block Diagram for Cyclone II Devices
4–4
Cyclone II Device Handbook, Volume 1
Resistor
f
Pull-Up
Weak
PAD
The POR circuit monitors V
tri-stated until the device is in user mode. The weak pull-up resistor (R)
from the I/O pin to V
tolerance control circuit permits the I/O pins to be driven by 3.3 V before
V
driving out when the device is not in user mode.
For more information, see the DC Characteristics & Timing Specifications
chapter in Volume 1 of the Cyclone II Device Handbook for the value of the
internal weak pull-up resistors.
Figure 4–2
I/O buffers. This design ensures that the output buffers do not drive
when V
than V
socketing. The V
circuit capacitance.
R
CCIO
Output
and/or V
CCIO
CCIO
. This also applies for sudden voltage spikes during hot
shows a transistor level cross section of the Cyclone II device
is powered before V
CCINT
PAD
leakage current charges the voltage tolerance control
are powered, and it prevents the I/O pins from
CCIO
Input Buffer
to Logic Array
Tolerance
Voltage
Control
keeps the I/O pins from floating. The voltage
CCINT
CCINT
Output Enable
voltage level and keeps I/O pins
or if the I/O pad voltage is higher
Hot Socket
Pre-Driver
Output
Power-On
Monitor
Reset
Altera Corporation
February 2007