EP3C25Q240C8N Altera, EP3C25Q240C8N Datasheet - Page 50

• Manufacturer Part Number: EP3C25Q240C8N
• Description: IC CYCLONE III FPGA 25K 240-PQFP
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C25Q240C8N

• Number Of Logic Elements/cells: 24624
• Number Of Labs/clbs: 1539
• Total Ram Bits: 608256
• Number Of I /o: 148
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 240-MQFP, 240-PQFP
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.544-2370 - KIT STARTER CYCLONE III EP3C25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2076; EP3C25Q240C8NES

Page 50
Figure 10. Design Space Explorer Window
f
f
For more information, refer to the
Quartus II Handbook.
The Optimization Advisors provide guidance in making settings that optimize your
design. On the Tools menu, point to Advisors, and click Resource Optimization
Advisor, or Timing Optimization Advisor. Evaluate the options and choose the
settings that best suit the requirements.
For more information about the various timing optimization settings in the Quartus II
software as well as the timing optimization techniques, refer to the
Integrated Synthesis
Timing Optimization
Recommended Timing Optimization and Analysis Assignments
The assignments and settings described in this section are not turned on in the
software by default for all designs, but are important for large designs.
Turn on Optimize fast-corner timing on the Fitter Settings page in the Settings
dialog box, as in
timing requirements at the Fast Timing process corner and operating condition, as
well as at the Slow Timing corner. Therefore, turning on this option helps create a
design implementation that is more robust across process, temperature, and voltage
variations.
Figure
chapter in volume 1 of the Quartus II Handbook and the
chapter in volume 2 of the Quartus II Handbook.
11. When this option is on, the design is optimized to meet its
Design Space Explorer
chapter in volume 2 of the
© November 2008 Altera Corporation
Quartus II
Area and
Verification