AT40K05AL-1AJC Atmel, AT40K05AL-1AJC Datasheet - Page 2
![IC FPGA 5K GATES 84PLCC](/photos/6/70/67047/453-84-plcc_sml.jpg)
AT40K05AL-1AJC
Manufacturer Part Number
AT40K05AL-1AJC
Description
IC FPGA 5K GATES 84PLCC
Manufacturer
Atmel
Series
AT40KALr
Specifications of AT40K05AL-1AJC
Number Of Logic Elements/cells
256
Total Ram Bits
2048
Number Of I /o
62
Number Of Gates
10000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Description
Fast, Flexible and
Efficient SRAM
Fast, Efficient Array and
Vector Multipliers
2
AT40KAL Series FPGA
Table 1. AT40KAL Family
Note:
The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed
10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global
clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), auto-
matic component generators, and range in size from 5,000 to 50,000 usable gates. I/O
counts range from 128 to 384 in industry standard packages ranging from 84-pin PLCC
to 352-ball Square BGA, and support 3.3V designs.
The AT40KAL is designed to quickly implement high-performance, large gate count
designs through the use of synthesis and schematic-based tools used on a PC or Sun
platform. Atmel’s design tools provide seamless integration with industry standard tools
such as Synplicity, ModelSim, Exemplar and Viewlogic. See the “IDS Datasheet” avail-
able on the Atmel web site (http://www.atmel.com/atmel/acrobat/doc1421.pdf) for a list
of other supported tools.
The AT40KAL can be used as a coprocessor for high-speed (DSP/processor-based)
designs by implementing a variety of computation intensive, arithmetic functions. These
include adaptive finite impulse response (FIR) filters, fast Fourier transforms (FFT), con-
volvers, interpolators and discrete-cosine transforms (DCT) that are required for video
compression and decompression, encryption, convolution and other multimedia
applications.
The AT40KAL FPGA offers a patented distributed 10 ns SRAM capability where the
RAM can be used without losing logic resources. Multiple independent, synchronous or
asynchronous, dual-port or single-port RAM functions (FIFO, scratch pad, etc.) can be
created using Atmel’s macro generator tool.
The AT40KAL’s patented 8-sided core cell with direct horizontal, vertical and diagonal
cell-to-cell connections implements ultra fast array multipliers without using any busing
resources. The AT40KAL’s Cache Logic capability enables a large number of design
coefficients and variables to be implemented in a very small amount of silicon, enabling
vast improvement in system speed at much lower cost than conventional FPGAs.
Device
Usable Gates
Rows x Columns
Cells
Registers
RAM Bits
I/O (Maximum)
1. Packages with FCK will have 8 less registers.
AT40K05AL
5K - 10K
16 x 16
496
2,048
256
128
(1)
(1)
AT40K10AL
10K - 20K
24 x 24
954
4,608
576
192
(1)
AT40K20AL
20K - 30K
1,520
32 x 32
1,024
8,192
256
(1)
2818F–FPGA–07/06
AT40K40AL
40K - 50K
48 x 48
3,048
18,432
2,304
384
(1)