EP2C70F672C6N Altera, EP2C70F672C6N Datasheet - Page 5

IC CYCLONE II FPGA 70K 672-FBGA

EP2C70F672C6N

Manufacturer Part Number
EP2C70F672C6N
Description
IC CYCLONE II FPGA 70K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C70F672C6N

Number Of Logic Elements/cells
68416
Number Of Labs/clbs
4276
Total Ram Bits
1152000
Number Of I /o
422
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
For Use With
P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2141

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Altera Corporation
February 2008
Flexible clock management circuitry
Device configuration
Intellectual property
133-MHz PCI-X 1.0 specification compatibility
High-speed external memory support, including DDR, DDR2,
and SDR SDRAM, and QDRII SRAM supported by drop in
Altera IP MegaCore functions for ease of use
Three dedicated registers per I/O element (IOE): one input
register, one output register, and one output-enable register
Programmable bus-hold feature
Programmable output drive strength feature
Programmable delays from the pin to the IOE or logic array
I/O bank grouping for unique VCCIO and/or VREF bank
settings
MultiVolt
3.3-interfaces
Hot-socketing operation support
Tri-state with weak pull-up on I/O pins before and during
configuration
Programmable open-drain outputs
Series on-chip termination support
Hierarchical clock network for up to 402.5-MHz performance
Up to four PLLs per device provide clock multiplication and
division, phase shifting, programmable duty cycle, and external
clock outputs, allowing system-level clock management and
skew control
Up to 16 global clock lines in the global clock network that drive
throughout the entire device
Fast serial configuration allows configuration times less than
100 ms
Decompression feature allows for smaller programming file
storage and faster configuration times
Supports multiple configuration modes: active serial, passive
serial, and JTAG-based configuration
Supports configuration through low-cost serial configuration
devices
Device configuration supports multiple voltages (either 3.3, 2.5,
or 1.8 V)
Altera megafunction and Altera MegaCore function support,
and Altera Megafunctions Partners Program (AMPP
megafunction support, for a wide range of embedded
processors, on-chip and off-chip interfaces, peripheral
functions, DSP functions, and communications functions and
I/O standard support for 1.5-, 1.8-, 2.5-, and
Cyclone II Device Handbook, Volume 1
Introduction
SM
)
1–3

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