EP2C20F484C7 Altera, EP2C20F484C7 Datasheet - Page 74

• Manufacturer Part Number: EP2C20F484C7
• Description: IC CYCLONE II FPGA 20K 484-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C20F484C7

• Number Of Logic Elements/cells: 18752
• Number Of Labs/clbs: 1172
• Total Ram Bits: 239616
• Number Of I /o: 315
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 18752
• # I/os (max): 315
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 18752
• Ram Bits: 239616
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• For Use With: P0528 - BOARD DEV DE1 ALTERA544-1736 - CYCLONE II STARTER KIT EP2C20N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1364; EP2C20F484C7

Document Revision History
Document
Revision History
2–62
Cyclone II Device Handbook, Volume 1
February 2007
v3.1
November 2005
v2.1
July 2005 v2.0
February 2005
v1.2
November 2004
v1.1
June 2004 v1.0
Table 2–21. Document Revision History
Document
Version
Date &
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Updated figure 2-12.
Updated
Added document to the Cyclone II Device Handbook.
Added document revision history.
Removed Table 2-1.
Updated
Added new
Added handpara note in
Updated
Updated
Updated
Updated Programmable Drive Strength table.
Updated
Updated
Updated
Updated technical content throughout.
Updated
Table
Table 2–21
Figure
Note (2)
Table
Figures 2–11
Table
Table
Table
Table
2–19.
Note (1)
2–7.
2–16.
2–18.
2–19.
2–16.
2–25.
to
Changes Made
Table
to
shows the revision history for this document.
Table
and 2–12.
“I/O Banks”
2–20.
2–17.
section.
●
●
Removed Drive Strength
Control from
Elaboration of DDR2 and
QDRII interfaces supported
by I/O bank included.
Summary of Changes
Altera Corporation
February 2007
Figure
2–25.