EP2C20F484C8 Altera, EP2C20F484C8 Datasheet - Page 80
![IC CYCLONE II FPGA 20K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2C20F484C8
Manufacturer Part Number
EP2C20F484C8
Description
IC CYCLONE II FPGA 20K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C20F484C8
Number Of Logic Elements/cells
18752
Number Of Labs/clbs
1172
Total Ram Bits
239616
Number Of I /o
315
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
18752
# I/os (max)
315
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
18752
Ram Bits
239616
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
For Use With
P0528 - BOARD DEV DE1 ALTERA544-1736 - CYCLONE II STARTER KIT EP2C20N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1365
EP2C20F484C8
EP2C20F484C8
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Quantity
Price
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Configuration Schemes
Configuration
Schemes
3–6
Cyclone II Device Handbook, Volume 1
Active serial (AS)
Passive serial (PS) Enhanced or EPC2 configuration device, MasterBlaster, ByteBlasterMV, ByteBlaster II or
JTAG
Table 3–4. Data Sources for Configuration
Configuration
Scheme
f
Low-cost serial configuration device
USB Blaster download cable, or serial data source
microprocessor with a Jam or JBC file
MasterBlaster, ByteBlasterMV, ByteBlaster II or USB Blaster download cable or a
SRAM configuration elements allow Cyclone II devices to be
reconfigured in-circuit by loading new configuration data into the device.
With real-time reconfiguration, the device is forced into command mode
with the nCONFIG pin. The configuration process loads different
configuration data, reinitializes the device, and resumes user-mode
operation. You can perform in-field upgrades by distributing new
configuration files within the system or remotely.
A built-in weak pull-up resistor pulls all user I/O pins to V
and during device configuration.
The configuration pins support 1.5-V/1.8-V or 2.5-V/3.3-V I/O
standards. The voltage level of the configuration output pins is
determined by the V
V
3.3-V compatible.
You can load the configuration data for a Cyclone II device with one of
three configuration schemes (see
target application. You can use a configuration device, intelligent
controller, or the JTAG port to configure a Cyclone II device. A low-cost
configuration device can automatically configure a Cyclone II device at
system power-up.
Multiple Cyclone II devices can be configured in any of the three
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
For more information on configuration, see the Configuring Cyclone II
Devices chapter of the Cyclone II Handbook, Volume 2.
CCIO
selects whether the configuration inputs are 1.5-V, 1.8-V, 2.5-V, or
CCIO
of the bank where the pins reside. The bank
Data Source
Table
3–4), chosen on the basis of the
Altera Corporation
February 2007
CCIO
before