EPF6024AQC240-3 Altera, EPF6024AQC240-3 Datasheet - Page 25

IC FLEX 6000 FPGA 24K 240-PQFP

EPF6024AQC240-3

Manufacturer Part Number
EPF6024AQC240-3
Description
IC FLEX 6000 FPGA 24K 240-PQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet

Specifications of EPF6024AQC240-3

Number Of Logic Elements/cells
1960
Number Of Labs/clbs
196
Number Of I /o
199
Number Of Gates
24000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Other names
544-1287

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0
Figure 14. IOE Connection to Column Interconnect
SameFrame
Pin-Outs
Altera Corporation
Any LE can drive a
pin through the row
and local interconnect.
FastFLEX I/O: An
LE can drive a
pin through a local
interconnect for faster
clock-to-output times.
3.3-V FLEX 6000 devices support the SameFrame pin-out feature for
FineLine BGA packages. The SameFrame pin-out feature is the
arrangement of balls on FineLine BGA packages such that the lower-ball-
count packages form a subset of the higher-ball-count packages.
SameFrame pin-outs provide the flexibility to migrate not only from
device to device within the same package, but also from one package to
another. A given printed circuit board (PCB) layout can support multiple
device density/package combinations. For example, a single board layout
can support an EPF6016A device in a 100-pin FineLine BGA package or an
EPF6024A device in a 256-pin FineLine BGA package.
The Altera software packages provide support to design PCBs with
SameFrame pin-out devices. Devices can be defined for present and future
use. The Altera software packages generate pin-outs describing how to lay
out a board to take advantage of this migration (see
Row Interconnect
IOE
Each IOE can drive two
column interconnect channels.
Each IOE data and OE signal is
driven to a local interconnect.
FLEX 6000 Programmable Logic Device Family Data Sheet
LAB
IOE
Column Interconnect
Figure
15).
25

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