EPF6016ATC144-2 Altera, EPF6016ATC144-2 Datasheet - Page 19
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EPF6016ATC144-2
Manufacturer Part Number
EPF6016ATC144-2
Description
IC FLEX 6000 FPGA 16K 144-TQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet
1.EPF6010ATC100-3N.pdf
(52 pages)
Specifications of EPF6016ATC144-2
Number Of Logic Elements/cells
1320
Number Of Labs/clbs
132
Number Of I /o
117
Number Of Gates
16000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Family Name
FLEX 6000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1320
# Registers
1320
# I/os (max)
117
Frequency (max)
166.67MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
3.3V
Logic Cells
1320
Device System Gates
16000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1275
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF6016ATC144-2
Manufacturer:
ALTERA
Quantity:
10
Company:
Part Number:
EPF6016ATC144-2
Manufacturer:
ALTERA
Quantity:
1 200
Part Number:
EPF6016ATC144-2
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPF6016ATC144-2N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
FLEX 6000 Programmable Logic Device Family Data Sheet
A row channel can be driven by an LE or by one of two column channels.
These three signals feed a 3-to-1 multiplexer that connects to six specific
row channels. Row channels drive into the local interconnect via
multiplexers.
Each column of LABs is served by a dedicated column interconnect. The
LEs in an LAB can drive the column interconnect. The LEs in an LAB, a
column IOE, or a row interconnect can drive the column interconnect. The
column interconnect can then drive another row’s interconnect to route
the signals to other LABs in the device. A signal from the column
interconnect must be routed to the row interconnect before it can enter an
LAB.
Each LE has a FastTrack Interconnect output and a local output. The
FastTrack interconnect output can drive six row and two column lines
directly; the local output drives the local interconnect. Each local
interconnect channel driven by an LE can drive four row and two column
channels. This feature provides additional flexibility, because each LE can
drive any of ten row lines and four column lines.
In addition, LEs can drive global control signals. This feature is useful for
distributing internally generated clock, asynchronous clear, and
asynchronous preset signals. A pin-driven global signal can also drive
data signals, which is useful for high-fan-out data signals.
Each LAB drives two groups of local interconnects, which allows an LE to
drive two LABs, or 20 LEs, via the local interconnect. The row-to-local
multiplexers are used more efficiently, because the multiplexers can now
drive two LABs.
Figure 10
shows how an LAB connects to row and
column interconnects.
Altera Corporation
19