EP3C16E144C8N Altera, EP3C16E144C8N Datasheet - Page 56

• Manufacturer Part Number: EP3C16E144C8N
• Description: IC CYCLONE III FPGA 16K 144EQFP
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C16E144C8N

• Number Of Logic Elements/cells: 15408
• Number Of Labs/clbs: 963
• Total Ram Bits: 516096
• Number Of I /o: 84
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-EQFP
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 15408
• # I/os (max): 84
• Frequency (max): 402MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 15408
• Ram Bits: 516096
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: EQFP
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2456

2–12
Table 2–16. Cyclone III LS Devices Differential SSTL I/O Standard Specifications
Table 2–17. Cyclone III LS Devices Differential HSTL I/O Standard Specifications
Table 2–18. Differential I/O Standard Specifications
Cyclone III Device Handbook, Volume 2
SSTL-2
Class I, II
SSTL-18
Class I, II
HSTL-18
Class I, II
HSTL-15
Class I, II
HSTL-12
Class I, II
LVPECL
(Row
I/Os)
LVPECL
(Column
I/Os)
LVDS
(Row
I/Os)
LVDS
(Column
I/Os)
I/O Standard
I/O Standard
Standard
I/O
(3)
(3)
2.375
2.375
2.375
2.375
f
Min
2.375
1.425
Min
1.71
1.14
Min
1.7
V
C CIO
Typ
2.5
2.5
2.5
2.5
V
V
For more information about receiver input and transmitter output waveforms, and for
other differential I/O standards, refer to the
Cyclone III Devices
C CIO
C CIO
Typ
2.5
1.8
(V)
Typ
1.8
1.5
1.2
(V)
(V)
2.625
2.625
2.625
2.625
Max
2.625 0.36
1.575
1.90
Max
Max
1.89
1.26
Min Max Min
100
100
100
100
V
0.25
Min
0.16
Min
V
0.2
0.2
ID
Sw ing(DC )
V
(mV)
DIF(D C)
—
—
—
—
chapter.
Max
V
V
Max
(V)
V
(V)
C CIO
C CIO
—
—
C CIO
0.5
0.5
0.5
0.5
0
1
0
1
0
1
0
1
V
(Note 1)
0.48 * V
CC IO
V
0.175
D
500 Mbps ≤ D
D
D
500 Mbps ≤ D
D
D
500 Mbps ≤ D
D
D
500 Mbps ≤ D
D
CC IO
700 Mbps
700 Mbps
700 Mbps
700 Mbps
Min
/2 – 0.2
0.85
0.71
Min
M AX
M AX
M AX
M AX
M AX
M AX
M AX
M AX
/2 –
> 700 Mbps
> 700 Mbps
Condition
≤ 500 Mbps
≤ 500 Mbps
≤ 500 Mbps
> 700 Mbps
≤ 500 Mbps
> 700 Mbps
CC IO
(Part 1 of 2)
V
V
V
ICM
X (A C)
X (A C)
(V)
Typ
Typ
(V)
—
—
—
—
—
(V)
MA X
MA X
MA X
MA X
≤
≤
≤
≤
V
V
0.52 *
0.175
C CIO
C CIO
Max
Max
0.95
0.79
V
0.2
High-Speed Differential Interfaces in
CC IO
/2 +
/2 +
Max Min Typ Max
1.85
1.85
1.85
1.85
1.85
1.85
1.85
1.85
1.6
1.6
1.6
1.6
Min Max
V
0.7
0.5
0.48 *
247
247
—
—
Sw ing(AC )
0.85
0.71
Min
V
Chapter 2: Cyclone III LS Device Data Sheet
C CIO
V
O D
V
V
(mV)
(V)
—
—
—
—
CC IO
CC IO
V
© December 2009 Altera Corporation
C M(D C)
Typ
—
—
—
(2)
(V)
600
600
V
V
—
—
0.125
0.125
CC IO
CC IO
Min
0.52 *
Max
0.95
0.79
/2 –
/2 –
V
CC IO
1.125 1.25 1.375
1.125 1.25 1.35
Electrical Characteristics
Min
—
—
V
O X(AC )
Typ
V
—
—
Min
OS
0.4
0.4
0.3
(V)
Typ
(V)
V
—
—
DIF(AC )
V
V
(2)
0.125
0.125
CC IO
CC IO
Max
0.48 *
Max
(V)
V
—
—
Max
/2 +
/2 +
CC IO
—
—