ADSP-2181KS-115 Analog Devices Inc, ADSP-2181KS-115 Datasheet - Page 26
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ADSP-2181KS-115
Manufacturer Part Number
ADSP-2181KS-115
Description
IC DSP CONTROLLER 16BIT 128PQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet
1.ADSP-2181BSZ-133.pdf
(32 pages)
Specifications of ADSP-2181KS-115
Rohs Status
RoHS non-compliant
Interface
Synchronous Serial Port (SSP)
Clock Rate
28.8MHz
Non-volatile Memory
External
On-chip Ram
80kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
ADSP-2181
CAPACITIVE LOADING
Figures 22 and 23 show the capacitive loading characteristics of
the ADSP-2181.
Figure 22. Range of Output Rise Time vs. Load Capaci-
tance, C
Figure 23. Range of Output Valid Delay or Hold vs. Load
Capacitance, C
Temperature)
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (t
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low volt-
age level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
t
load, i
lowing equation:
from which
DECAY
L
, is dependent on the capacitive load, C
, on the output pin. It can be approximated by the fol-
25
20
15
10
L
16
14
12
10
–2
–4
5
0
8
6
4
2
0
(at Maximum Ambient Operating Temperature)
0
0
L
(at Maximum Ambient Operating
DIS
50
50
t
DIS
) is the difference of t
t
DECAY
t
MEASURED
100
100
C
C
C
L
L
– pF
L
– pF
150
i
150
– t
L
0.5V
DECAY
MEASURED
200
200
L
, and the current
and t
250
250
DECAY
,
–26–
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
a reference signal reaches a high or low voltage level to when
the output has reached a specified high or low trip point, as
shown in the Output Enable/Disable diagram. If multiple pins
(such as the data bus) are enabled, the measurement value is
that of the first pin to start driving.
REFERENCE
Figure 24. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Figure 26. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
(MEASURED)
OUTPUT
(MEASURED)
OUTPUT
SIGNAL
INPUT
OR
OUTPUT
V
V
OH
OL
Figure 25. Output Enable/Disable
OUTPUT STOPS
PIN
TO
t
t
MEASURED
DIS
DRIVING
1.5V
50pF
V
V
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
OH
OL
t
DECAY
(MEASURED) +0.5V
(MEASURED) – 0.5V
I
ENA
I
OH
OL
) is the interval from when
OUTPUT STARTS
1.0V
2.0V
DRIVING
t
ENA
+1.5V
1.5V
V
(MEASURED)
V
(MEASURED)
OH
OL
REV. D