ADSP-2181BSZ-133 Analog Devices Inc, ADSP-2181BSZ-133 Datasheet - Page 16

IC DSP CONTROLLER 16BIT 128PQFP

ADSP-2181BSZ-133

Manufacturer Part Number
ADSP-2181BSZ-133
Description
IC DSP CONTROLLER 16BIT 128PQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2181BSZ-133

Interface
Synchronous Serial Port (SSP)
Clock Rate
33.3MHz
Non-volatile Memory
External
On-chip Ram
80kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
No. Of Bits
16
Frequency
33.3MHz
Supply Voltage
5V
No. Of Mips
40
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFP
No.
RoHS Compliant
Package
128MQFP
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
33.3 MHz
Ram Size
80 KB
Device Million Instructions Per Second
33.3 MIPS
Embedded Interface Type
SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2181BSZ-133
Manufacturer:
LEADTEK
Quantity:
300
Part Number:
ADSP-2181BSZ-133
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-2181
Parameter
Bus Request/Grant
Timing Requirements:
t
t
Switching Characteristics:
t
t
t
t
t
t
NOTES
xMS = PMS, DMS, CMS, IOMS, BMS.
1
2
BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on
BGH is asserted when the bus is granted and the processor requires control of the bus to continue.
BH
BS
SD
SDB
SE
SEC
SDBH
SEH
the following cycle. Refer to the ADSP-2100 Family User’s Manual, Third Edition for BR/BG cycle relationships.
BR Hold after CLKOUT High
BR Setup before CLKOUT Low
CLKOUT High to xMS,
RD, WR Disable
xMS, RD, WR
Disable to BG Low
BG High to xMS,
RD, WR Enable
xMS, RD, WR
Enable to CLKOUT High
xMS, RD, WR
Disable to BGH Low
BGH High to xMS,
RD, WR Enable
PMS, DMS
CLKOUT
CLKOUT
BMS, RD
BGH
WR
BR
BG
2
2
t
Figure 10. Bus Request–Bus Grant
SD
t
1
BH
1
t
t
BS
t
SDBH
SDB
–16–
Min
0.25t
0.25t
0
0
0.25t
0
0
CK
CK
CK
+ 2
+ 17
– 4
t
t
SEH
SE
t
SEC
Max
0.25t
CK
+ 10
REV. D
Unit
ns
ns
ns
ns
ns
ns
ns
ns

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