XCR3032XL-5PC44C Xilinx Inc, XCR3032XL-5PC44C Datasheet
XCR3032XL-5PC44C
Specifications of XCR3032XL-5PC44C
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XCR3032XL-5PC44C Summary of contents
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... XCR3032XL 32 Macrocell CPLD Product Specification 0 14 Description The CoolRunner™ XPLA3 XCR3032XL device is a 3.3V, 32-macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of two function blocks provide 750 usable gates. Pin-to-pin propagation delays are as fast as 4.5 ns with a maximum system frequency of 213 MHz ...
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... XCR3032XL 32 Macrocell CPLD DC Electrical Characteristics Over Recommended Operating Conditions (1) Symbol Parameter (2) V Output High voltage OH V Output Low voltage OL (4) I Input leakage current IL (4) I I/O High-Z leakage current IH (8) I Standby current CCSB (5,6) I Dynamic current CC (7) C Input pin capacitance IN C Clock input capacitance ...
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... DS023 (v2.2) September 15, 2008 Product Specification -5 (1, 2) Min. Max. 4.5 (3) 5.0 3.5 2.5 3.0 3.5 0 2.5 4.0 4 213 - - - 7.2 (6) - 7.2 - 6.0 - 6.5 www.xilinx.com XCR3032XL 32 Macrocell CPLD -7 -10 Min. Max. Min. Max. - 7.0 - 9.1 - 7.5 - 10.0 5.0 - 6.5 - 3 4 4.8 - 6.3 - ...
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... XCR3032XL 32 Macrocell CPLD Internal Timing Parameters Symbol Parameter Buffer Delays T Input buffer delay IN T Fast Input buffer delay FIN T Global Clock buffer delay GCK T Output buffer delay OUT T Output buffer enable/disable delay EN Internal Register, Product Term, and Combinatorial Delays T Latch transparent delay ...
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... POD output level of V Figure 3: AC Load Circuit +3.0V 0V Measurements: All circuit delays are measured at the +1.5V level of inputs and outputs, unless otherwise specified DS023_05_061101 PD2 www.xilinx.com XCR3032XL 32 Macrocell CPLD Values 390Ω 390Ω Open Closed Closed Open Closed Closed , ...
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... VQ44 CS48 Notes This is an obsolete package type. It remains here for legacy support only JTAG pins. (2) ( Table 4: XCR3032XL Global, JTAG, Port Enable, Power and No Connect Pins Pin Type 5 D3 IN0 / CLK0 6 D1 (2) (2) IN1 / CLK1 IN2 / CLK2 IN3 / CLK3 10 F1 TCK ...
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... VQG44 44 Very Thin Quad Flat Pack (VQFP); Pb- Free CS48 48 Chip Scale Package (CSP) CSG48 48 Chip Scale Package (CSP); Pb-Free VQ44 44 Very Thin Quad Flat Pack (VQFP) www.xilinx.com XCR3032XL 32 Macrocell CPLD This line not related to device part number Operating Package Type Range ( ...
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... XCR3032XL 32 Macrocell CPLD Ordering Combination Information Speed Device Ordering and (pin-to-pin Part Marking Number delay) XCR3032XL-10VQG44I 10 ns XCR3032XL-10CS48I 10 ns XCR3032XL-10CSG48I 10 ns Notes Commercial 0° to +70° Industrial (Continued) Pkg. No. of Symbol Pins VQG44 44 Very Thin Quad Flat Pack (VQFP); Pb-Free CS48 ...
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... SU SU2 Figure 2. Increased -5 T parameter to internal timing model. Increased -5 F PTCK Typical and T specifications. Removed T CCSB APRPW Information. See Product Discontinuation Notice www.xilinx.com XCR3032XL 32 Macrocell CPLD Figure 2; added Table 2: Total User 1. changed - 200 MHz SYSTEM ) to AC Table, SU1 delay POD to 6.0 (from 5.5 ns) by PCO ...