ATF2500CL-20JC Atmel, ATF2500CL-20JC Datasheet - Page 3

• Manufacturer Part Number: ATF2500CL-20JC
• Description: IC CPLD EE 20NS 40PLCC
• Manufacturer: Atmel
• Series: ATF2500C(L)r

Specifications of ATF2500CL-20JC

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 20.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Macrocells: 24
• Number Of I /o: 24
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Voltage: 5V
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -

Power-up Reset
0777I–PLD–4/03
Parameter
t
V
PR
Odd I/O Pin during
RST
PRELOAD Cycle
Level Forced on
V
V
V
V
IH
IH
IH
IH
/V
/V
/V
/V
IL
IL
IL
IL
Q Select Pin
Description
Power-up Reset Time
Power-up Reset Voltage
State
The registers in the ATF2500Cs are designed to reset during power-up. At a point delayed
slightly from V
depend on the polarity of the output buffer.
This feature is critical for state as nature of reset and the uncertainty of how V
in the system, the following conditions are required:
1. The V
2. After reset occurs, all input and feedback setup times must be met before driving the
3. The clock pin, and any signals from which clock terms are derived, must remain stable
High
High
Low
Low
clock pin or terms high, and
during t
CC
PR
rise must be monotonic,
.
Even/Odd
CC
Select
High
High
Low
Low
crossing V
RST
Even Q1 State
after Cycle
, all registers will be reset to the low state. The output state will
High/Low
X
X
X
Even Q2 State
after Cycle
High/Low
X
X
X
Typ
600
3.8
ATF2500C Family
Odd Q1 State
after Cycle
High/Low
1000
Max
4.5
X
X
X
CC
Odd Q2 State
after Cycle
actually rises
High/Low
Units
ns
X
X
X
V
3