EPM7256AETC100-10N Altera, EPM7256AETC100-10N Datasheet - Page 12
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EPM7256AETC100-10N
Manufacturer Part Number
EPM7256AETC100-10N
Description
IC MAX 7000 CPLD 256 100-TQFP
Manufacturer
Altera
Series
MAX® 7000Ar
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AETC100-10N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
256
Number Of Gates
5000
Number Of I /o
84
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
3.3V
Memory Type
EEPROM
Number Of Logic Elements/cells
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-2057
EPM7256AETC100-10N
EPM7256AETC100-10N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256AETC100-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 7000A Programmable Logic Device Data Sheet
Figure 4. MAX 7000A Parallel Expanders
12
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
36 Signals
from PIA
Expanders
16 Shared
Programmable Interconnect Array
Logic is routed between LABs on the PIA. This global bus is a
programmable path that connects any signal source to any destination on
the device. All MAX 7000A dedicated inputs, I/O pins, and macrocell
outputs feed the PIA, which makes the signals available throughout the
entire device. Only the signals required by each LAB are actually routed
from the PIA into the LAB.
into the LAB. An EEPROM cell controls one input to a 2-input AND gate,
which selects a PIA signal to drive into the LAB.
Product-
Product-
Select
Select
Matrix
Matrix
Term
Term
Macrocell
Previous
From
Figure 5
shows how the PIA signals are routed
Macrocell
To Next
Preset
Preset
Clock
Clear
Clock
Clear
Altera Corporation
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic