EPM240T100C3N Altera, EPM240T100C3N Datasheet - Page 85
![IC MAX II CPLD 240 LE 100-TQFP](/photos/6/70/67055/544-100-tqfp_sml.jpg)
EPM240T100C3N
Manufacturer Part Number
EPM240T100C3N
Description
IC MAX II CPLD 240 LE 100-TQFP
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM240T100C3N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
4.7ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
240
Number Of Macrocells
192
Number Of I /o
80
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
240
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-1962
EPM240T100C3N
EPM240T100C3N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM240T100C3N
Manufacturer:
ALTERA
Quantity:
720
Part Number:
EPM240T100C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 5: DC and Switching Characteristics
Document Revision History
Document Revision History
Table 5–35. Document Revision History (Part 1 of 2)
© August 2009 Altera Corporation
August 2009,
version 2.5
November 2008,
version 2.4
October 2008,
version 2.3
July 2008,
version 2.2
March 2008,
version 2.1
December 2007,
version 2.0
December 2006,
version 1.8
July 2006,
version 1.7
February 2006,
version 1.6
November 2005,
version 1.5
August 2005,
version 1.4
Date and Revision
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Table 5–35
Added
Updated
Table
Table
Table
Updated Table 5–2.
Updated “Internal Timing Parameters” section.
Updated New Document Format.
Updated Figure 5–1.
Updated Table 5–14 , Table 5–23 , and Table 5–24.
Added (Note 5) to Table 5–4.
Updated (Note 3) and (4) to Table 5–1.
Updated Table 5–2 and added (Note 5).
Updated ICCSTANDBY and ICCPOWERUP information and added
IPULLUP information in Table 5–4.
Added (Note 1) to Table 5–10.
Updated Figure 5–2.
Added (Note 1) to Table 5–13.
Updated Table 5–13 through Table 5–24, and Table 5–27 through
Table 5–30.
Added tCOMB information to Table 5–15.
Updated Figure 5–6.
Added “Referenced Documents” section.
Added note to Table 5–1.
Added document revision history.
Minor content and table updates.
Updated “External Timing I/O Delay Adders” section.
Updated Table 5–29.
Updated Table 5–30.
Updated Tables 5-2, 5-4, and 5-12.
Updated Figure 5-1.
Updated Tables 5-13, 5-16, and 5-26.
Removed Note 1 from Table 5-12.
5–17,
5–22,
5–32, and
Table
Table
shows the revision history for this chapter.
Table
Table
5–28,
5–2,
Table
5–18,
5–23,
Table
Table
5–33.
Table
Table
5–29, and
5–4,
Changes Made
5–19,
5–24,
Table
Table
Table
Table
5–14,
5–30.
5–20,
5–27,
Table
Table
Table
5–15,
5–21,
5–31,
Table
5–16,
Added information for
speed grade –8
Updated document with
MAX IIZ information.
Summary of Changes
MAX II Device Handbook
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5–27