EPM7160ELI84-20 Altera, EPM7160ELI84-20 Datasheet - Page 64
![IC MAX 7000 CPLD 160 84-PLCC](/photos/6/70/67059/544-84-plcc_sml.jpg)
EPM7160ELI84-20
Manufacturer Part Number
EPM7160ELI84-20
Description
IC MAX 7000 CPLD 160 84-PLCC
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7160ELI84-20
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
20.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
10
Number Of Macrocells
160
Number Of Gates
3200
Number Of I /o
64
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
84-PLCC
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
10
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2338-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7160ELI84-20
Manufacturer:
ALTERA
Quantity:
26
Part Number:
EPM7160ELI84-20
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPM7160ELI84-20H
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 7000 Programmable Logic Device Family Data Sheet
Revision
History
64
The information contained in the MAX 7000 Programmable Logic Device
Family Data Sheet version 6.7 supersedes information published in
previous versions. The following changes were made in the MAX 7000
Programmable Logic Device Family Data Sheet version 6.7:
Version 6.7
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.7:
■
Version 6.6
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.6:
■
■
Version 6.5
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.5:
■
Version 6.4
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.4:
■
Version 6.3
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.3:
■
Reference to AN 88: Using the Jam Language for ISP & ICR via an
Embedded Processor has been replaced by AN 122: Using Jam STAPL for
ISP & ICR via an Embedded Processor.
Added
Added
“Programming Times” section on page 18.
Updated text on
Added
Updated the
Only)” section on page
Tables 6
“Programming Sequence” section on page 17
Note (5)
“Open-Drain Output Option (MAX 7000S Devices
through 8.
on
page
page
16.
20.
28.
Altera Corporation
and