EPM7032AETC44-10 Altera, EPM7032AETC44-10 Datasheet - Page 23
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EPM7032AETC44-10
Manufacturer Part Number
EPM7032AETC44-10
Description
IC MAX 7000 CPLD 32 44-TQFP
Manufacturer
Altera
Series
MAX® 7000Ar
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7032AETC44-10
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
2
Number Of Macrocells
32
Number Of Gates
600
Number Of I /o
36
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
3.3V
Memory Type
EEPROM
Number Of Logic Elements/cells
2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-1178
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7032AETC44-10
Manufacturer:
ALTERA
Quantity:
330
Company:
Part Number:
EPM7032AETC44-10
Manufacturer:
ALTERA
Quantity:
748
Part Number:
EPM7032AETC44-10
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EPM7032AETC44-10N
Manufacturer:
ALTERA
Quantity:
63
Company:
Part Number:
EPM7032AETC44-10N
Manufacturer:
ALTERA
Quantity:
545
Altera Corporation
Figure 8
Figure 8. MAX 7000A JTAG Waveforms
Table 11
devices.
Note:
(1)
Captured
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Table 11. JTAG Timing Parameters & Values for MAX 7000A Devices
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
Timing parameters shown in this table apply for all specified VCCIO levels.
TDI
shows timing information for the JTAG signals.
shows the JTAG timing parameters and values for MAX 7000A
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JCH
t
t
JPZX
JSZX
t
JCP
t
JSSU
MAX 7000A Programmable Logic Device Data Sheet
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JSXZ
JPH
Min
100
50
50
20
45
20
45
t
Max
JPXZ
25
25
25
25
25
25
Note (1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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