AD9777BSVRL Analog Devices Inc, AD9777BSVRL Datasheet - Page 2

• Manufacturer Part Number: AD9777BSVRL
• Description: IC DAC 16BIT DUAL 160MSPS 80TQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9777BSVRL

• Rohs Status: RoHS non-compliant
• Settling Time: 11ns
• Number Of Bits: 16
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 410mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• For Use With: AD9777-EBZ - BOARD EVALUATION FOR AD9777

AD9777
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 4
Specifications..................................................................................... 5
Absolute Maximum Ratings............................................................ 9
Pin Configuration and Function Descriptions........................... 10
Terminology .................................................................................... 12
Typical Performance Characteristics ........................................... 13
Functional Description .................................................................. 22
Product Highlights ....................................................................... 4
DC Specifications ......................................................................... 5
Dynamic Specifications ............................................................... 6
Digital Specifications ................................................................... 7
Digital Filter Specifications ......................................................... 8
Thermal Characteristics .............................................................. 9
ESD Caution.................................................................................. 9
Mode Control (via SPI Port)..................................................... 18
Register Description................................................................... 20
Serial Interface for Register Control ........................................ 22
General Operation of the Serial Interface ............................... 22
Instruction Byte .......................................................................... 23
R/W .............................................................................................. 23
N1, N0 .......................................................................................... 23
A4, A3, A2, A1, A0..................................................................... 23
Serial Interface Port Pin Descriptions ..................................... 23
MSB/LSB Transfers..................................................................... 23
Notes on Serial Port Operation ................................................ 25
DAC Operation........................................................................... 25
1R/2R Mode ................................................................................ 26
CLOCK Input Configuration ................................................... 26
Programmable PLL .................................................................... 27
Power Dissipation....................................................................... 29
Rev. C | Page 2 of 60
Applying the Output Configurations........................................... 46
Evaluation Board ............................................................................ 48
Outline Dimensions ....................................................................... 58
Sleep/Power-Down Modes........................................................ 29
Two Port Data Input Mode ....................................................... 29
PLL Enabled, Two-Port Mode .................................................. 30
DATACLK Inversion.................................................................. 30
DATACLK Driver Strength....................................................... 30
PLL Enabled, One-Port Mode .................................................. 30
ONEPORTCLK Inversion......................................................... 31
ONEPORTCLK Driver Strength.............................................. 31
IQ Pairing .................................................................................... 31
PLL Disabled, Two-Port Mode................................................. 31
PLL Disabled, One-Port Mode ................................................. 32
Digital Filter Modes ................................................................... 32
Amplitude Modulation.............................................................. 32
Modulation, No Interpolation .................................................. 34
Modulation, Interpolation = 2× ............................................... 35
Modulation, Intermodulation = 4× ......................................... 36
Modulation, Intermodulation = 8× ......................................... 37
Zero Stuffing ............................................................................... 38
Interpolating (Complex Mix Mode)........................................ 38
Operations on Complex Signals............................................... 38
Complex Modulation and Image Rejection of Baseband
Signals .......................................................................................... 39
Image Rejection and Sideband Suppressions of Modulated
Carriers ........................................................................................ 41
Unbuffered Differential Output, Equivalent Circuit ............. 46
Differential Coupling Using a Transformer............................ 46
Differential Coupling Using an Op Amp................................ 47
Interfacing with the AD8345 Quadrature Modulator........... 47
Ordering Guide .......................................................................... 58