AD5334BRU Analog Devices Inc, AD5334BRU Datasheet - Page 13
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AD5334BRU
Manufacturer Part Number
AD5334BRU
Description
IC DAC 8BIT QUAD VOUT 24-TSSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5336BRUZ.pdf
(20 pages)
Specifications of AD5334BRU
Rohs Status
RoHS non-compliant
Settling Time
6µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
4
Voltage Supply Source
Single Supply
Power Dissipation (max)
4.5mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5334BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
REV. 0
FUNCTIONAL DESCRIPTION
The AD5334/AD5335/AD5336/AD5344 are quad resistor-
string DACs fabricated on a CMOS process with resolutions of
8, 10, 10, and 12 bits, respectively. They are written to using a
parallel interface. They operate from single supplies of 2.5 V to
5.5 V and the output buffer amplifiers offer rail-to-rail output
swing. The gain of the buffer amplifiers in the AD5334 and
AD5336 can be set to 1 or 2 to give an output voltage range of
0 to V
put buffers with unity gain.
The devices have a power-down feature that reduces current
consumption to only 80 nA @ 3 V.
Digital-to-Analog Section
The architecture of one DAC channel consists of a reference
buffer and a resistor-string DAC followed by an output buffer
amplifier. The voltage at the V
voltage for the DAC. Figure 28 shows a block diagram of the
DAC architecture. Since the input coding to the DAC is
straight binary, the ideal output voltage is given by:
Figure 23. I
3 V and V
Figure 26. Full-Scale Error vs. V
–0.1
–0.2
0.4
0.3
0.2
0.1
300
0
REF
0
V
DD
V
T
DD
A
350
or 0 to 2 V
= 25 C
= 3V
DD
= 5V
1
DD
= 5 V
400
Histogram with V
2
V
I
DD
OUT
V
450
REF
REF
– A
3
– V
. The AD5335 and AD5344 have out-
=
500
V
4
REF
V
DD
REF
550
= 5V
×
5
pin provides the reference
2
D
DD
600
N
REF
=
6
×
Gain
Figure 24. AD5344 Major-Code Tran-
sition Glitch Energy
0.923
0.929
0.928
0.927
0.926
0.925
0.924
0.922
0.921
0.920
0.919
Figure 27. DAC-DAC Crosstalk
750ns/DIV
–13–
500ns/DIV
where:
D = decimal equivalent of the binary code which is loaded to
the DAC register:
N = DAC resolution
Gain = Output Amplifier Gain (1 or 2)
0–255 for AD5334 (8 Bits)
0–1023 for AD5335/AD5336 (10 Bits)
0–4095 for AD5344 (12 Bits)
REGISTER
INPUT
AD5334/AD5335/AD5336/AD5344
Figure 28. Single DAC Channel Architecture
REGISTER
DAC
Figure 25. Multiplying Bandwidth
(Small-Signal Frequency Response)
–10
–20
–30
–40
–50
–60
10
0
0.01
RESISTOR
0.1
STRING
V
REF
FREQUENCY – kHz
1
BUFFER AMPLIFIER
10
OUTPUT
GAIN
100
1k
V
OUT
10k