A3PN030-ZQNG68I Actel, A3PN030-ZQNG68I Datasheet - Page 12

• Manufacturer Part Number: A3PN030-ZQNG68I
• Manufacturer: Actel

ProASIC3 nano Device Overview
Part Number and Revision Date
List of Changes
1 -8
Previous Version
Advance v0.5
(August 2009)
Advance v0.4
(January 2009)
Advance v0.3
(November 2008)
Advance v0.2
(October 2008)
Advance v0.1
(October 2008)
Wide Range I/O Support
Actel nano devices support JEDEC-defined wide range I/O operation. ProASIC3 nano supports the
JESD8-B specification, covering both 3 V and 3.3 V supplies, for an effective operating range of
2.7 V to 3.6 V.
Wider I/O range means designers can eliminate power supplies or power conditioning components
from the board or move to less costly components with greater tolerances. Wide range eases I/O
bank management and provides enhanced protection from system voltage spikes, while providing
the flexibility to easily run custom voltage applications.
Part Number 51700111-001-5
Revised January 2010
The following table lists critical changes that were made in the current version of the document.
The note for A3PN030 in the
A3PN030 is available in the Z feature grade only.
All references to speed grade –F were removed from this document.
The"I/Os with Advanced I/O Standards" section
hot-swap and cold-sparing.
Table 1 · ProASIC3 nano Devices
A3PN020 and A3PN030. The following table note was removed: "Six chip (main)
and three quadrant global networks are available for A3PN060 and above."
The QN100 package was removed for all devices.
The
The A3PN030 device was added to product tables and replaces A3P030 entries
that were formerly in the tables.
The
The
table note 4: "For nano devices, the VQ100 package is offered in both leaded and
RoHS-compliant versions. All other packages are RoHS-compliant only."
The
updated to remove QN100 for A3PN250.
The
about number of gates and dual-port RAM for ProASIC3 nano devices.
The device architecture figures,
Overview
Figure 1-4 · ProASIC3 nano Device Architecture Overview with Four I/O Banks
(A3PN250), were revised.
with Two I/O Banks and No RAM (A3PN010 and A3PN030)
The
A3PN020 and smaller devices.
"Device Marking" section
"Wide Range I/O Support" section
"I/Os Per Package"
"PLL and CCC" section
"ProASIC3 nano Product Available in the Z Feature Grade" section
"General Description" section
with
Changes in Current Version (Advance v0.6)
Two
table was updated to add the following information to
I/O
Figure 1-1 · ProASIC3 Device Architecture Overview
was revised to include information about CCC-GLs in
"ProASIC3 nano Devices"
A dv a n c e v 0. 6
is new.
was revised to change the maximum user I/Os for
Banks
Figure 1-3 · ProASIC3 nano Device Architecture
was updated to give correct information
is new.
(A3PN060
was revised to add definitions of
and
table was revised. It states
is new.
A3PN125)
through
was
through
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