MAX532BEWE+T Maxim Integrated Products, MAX532BEWE+T Datasheet - Page 11
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MAX532BEWE+T
Manufacturer Part Number
MAX532BEWE+T
Description
IC MDAC 12BIT DUAL SER 16-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX532ACPE.pdf
(16 pages)
Specifications of MAX532BEWE+T
Settling Time
2.5µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Dual ±
Power Dissipation (max)
762mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1. t
With the values of t
given by t
must be calculated to determine t
Additionally, the maximum clock frequency is limited to
For example, with t
1kΩ pull-up), the maximum clock frequency is 2MHz.
Figure 8. Simplified D/A Circuit Diagram
f
V
CLK
PULL-UP
11.4
11.4
11.4
11.4
11.4
13.5
13.5
13.5
13.5
13.5
4.5
4.5
4.5
4.5
4.5
(max) =
VREF_
DV
SC
2R
(V)
RC
+ t
Delay Times
DS
______________________________________________________________________________________
————————————— .
. For different values of R or C, t
2 x (t
RC
C (pF)
RC
100
150
100
150
100
150
20
35
50
20
35
50
20
35
50
given in Table 1, t
SB
2R
= 15ns (5V ±10% supply with
DO
+ t
RC
1
R
CSS0
-15ns + t
P
SA
1
1
1
1
1
3
3
3
3
3
3
3
3
3
3
2R
(kΩ)
.
R
CSS0
DS
)
t
Voltage-Output, 12-Bit MDAC
RC
is always
114
106
15
27
38
76
14
25
35
71
12
21
29
59
88
2R
S9
(ns)
RC
R
Figure 8 shows a simplified circuit diagram for one of
the DACs and the output amplifier.
A segmented scheme is used to improve linearity,
whereby the two MSBs of the 12-bit data word are
decoded to drive the three switches, SA, SB, and SC.
The remaining ten bits drive the switches S0 through S9
in a standard R-2R ladder configuration.
Each of the switches, SA, SB, and SC, steers 1/4 of the
total reference current with the remaining 1/4 passing
through the R-2R section.
The output amplifier and feedback resistor perform the
current-to-voltage conversion, giving the following:
where _ denotes A or B, and D is the fractional representa-
tion of the digital word. (D can be set from 0 to 4095/4096.)
Figure 9. Unipolar Binary Operation
2R
SHOWN FOR ALL 1s ON DAC
S8
V
IN
R
VREFA
Dual, Serial-Input,
DGND
VOUT_ = -D x VREF_,
S0
2R
-12V to -15V
+12V to +15V
DACA
V
V
DD
SS
Digital-to-Analog Section
AGNDA
2R
MAX532
R/2
VOUTA
RFBA
VOUT_
AGND_
RFB_
V
OUT
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