M5M51008DVP-55H Renesas Electronics America, M5M51008DVP-55H Datasheet - Page 7

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M5M51008DVP-55H

Manufacturer Part Number
M5M51008DVP-55H
Description
Manufacturer
Renesas Electronics America
Datasheet

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Write cycle (S
DQ
A
S
W
DQ
Write cycle ( S
S
A
S
W
S
0~16
2
1
0~16
2
1
1~8
1~8
2
1
control mode)
control mode)
Note 5: Hatching indicates the state is "don't care".
6: Writing is executed while S
7: When the falling edge of W is simultaneously or prior to the falling edge of S
8: Don't apply inverted phase signal externally when DQ pin is output mode.
or rising edge of S
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 7)
2
(Note 7)
, the outputs are maintained in the high impedance state.
t
t
su (A)
su (A)
2
high overlaps S
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
t
(Note 6)
su (S2)
(Note 6)
t
t
t
su (S1)
CW
CW
t
1
su (D)
t
su (D)
and W low.
DATA IN
STABLE
DATA IN
STABLE
M5M51008DFP,VP,RV,KV,KR -55H, -70H
t
t
h (D)
t
h (D)
rec (W)
t
rec (W)
1
(Note 5)
(Note 5)
(Note 5)
(Note 5)
MITSUBISHI LSIs
Ver. 1.1
6

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