XC4VSX35-11FFG668CS2 Xilinx Inc, XC4VSX35-11FFG668CS2 Datasheet - Page 43

• Manufacturer Part Number: XC4VSX35-11FFG668CS2
• Description: FPGA Virtex®-4 Family 34560 Cells 90nm (CMOS) Technology 1.2V 668-Pin FCBGA
• Manufacturer: Xilinx Inc

Specifications of XC4VSX35-11FFG668CS2

• Package: 668FCBGA
• Family Name: Virtex®-4
• Device Logic Units: 34560
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 448
• Ram Bits: 3538944

Table 51: Frequency Synthesis
Table 52: DCM Switching Characteristics
Table 53: PMCD Switching Characteristic
DS302 (v3.7) September 9, 2009
Product Specification
Notes:
1.
2.
CLKFX_MULTIPLY
CLKFX_DIVIDE
T
T
T
T
T
T
PMCD_CLK_SKEW
CLKIN_FREQ_PMCD_CLKA_MAX
CLKIN_PSCLK_PULSE_RANGE
PMCD_REL_HIGH_PULSE_MIN
PMCD_RST_HIGH_PULSE_MIN
DMCCK_PSEN
DMCCK_PSINCDEC
DMCKO_PSDONE
PMCCCK_REL
PMCCO_CLK{A1,B,C,D}
PMCCKO_CLK{A1,B,C,D}
There is no minimum frequency for PMCD.
Refer to
Table 47
/
/
Symbol
Symbol
T
T
PMCCKC_REL
DMCKC_PSEN
/
parameter: CLKIN_PSCLK_PULSE_RANGE.
T
DMCKC_PSINCDEC
Attribute
(1)
PSEN Setup/Hold
PSINCDEC Setup/Hold
Clock to out of PSDONE
REL Setup/Hold for all outputs
RST assertion to clock output deassertion
Max clock propagation delay of PMCD for all outputs
Max phase between all outputs assuming all inputs
Max input/output frequency
Max duty cycle input tolerance (same as DCM)
Min pulse width for REL
Min pulse width for RST
www.xilinx.com
Description
Description
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Min
2
1
±150
0.93
0.00
0.93
0.00
0.60
0.00
4.00
4.60
1.11
1.11
0.60
500
-12
-12
Speed Grade
Speed Grade
Note (2)
±150
0.93
0.00
0.93
0.00
0.60
0.60
0.00
4.00
4.60
1.11
1.11
-11
-11
450
Max
32
32
±150
1.07
0.00
1.07
0.00
0.69
0.60
0.00
4.50
5.20
1.25
1.25
400
-10
-10
Units
Units
MHz
ns
ns
ns
ns
ns
ps
ns
ns
ns
43