LCMXO640C-3MN132C Lattice, LCMXO640C-3MN132C Datasheet - Page 5

• Manufacturer Part Number: LCMXO640C-3MN132C
• Description: CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 132-Pin CSBGA Tray
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640C-3MN132C

• Package: 132CSBGA
• Family Name: MachXO
• Number Of Macro Cells: 320
• Maximum Propagation Delay Time: 4.9 ns
• Number Of User I/os: 101
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Memory Type: SRAM
• Operating Temperature: 0 to 85 °C
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Macrocells: 320
• Number Of Gates: -
• Number Of I /o: 101
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-1. Top View of the MachXO1200 Device
1. Top view of the MachXO2280 device is similar but with higher LUT count, two PLLs, and three EBR blocks.
Figure 2-2. Top View of the MachXO640 Device
sysMEM Embedded
Block RAM (EBR)
sysCLOCK
PLL
JTAG Port
Programmable
Function Units
with RAM (PFUs)
JTAG Port
PIOs Arranged into
sysIO Banks
1
2-2
Programmable
Function Units
without RAM (PFFs)
MachXO Family Data Sheet
PIOs Arranged into
sysIO Banks
Programmable
Functional Units
without RAM (PFFs)
Programmable
Functional Units
with RAM (PFUs)
Architecture