74LV595D NXP Semiconductors, 74LV595D Datasheet - Page 12

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74LV595D

Manufacturer Part Number
74LV595D
Description
Shift Register Single 8-Bit Serial to Serial/Parallel 16-Pin SO Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LV595D

Package
16SO
Logic Function
Shift Register
Logic Family
LV
Operation Mode
Serial to Serial/Parallel
Direction Type
Uni-Directional
Number Of Element Outputs
9
Number Of Elements Per Chip
1
Output Type
3-State
Typical Operating Supply Voltage
3.3 V
Operating Temperature
-40 to 125 °C
Dc
0442

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NXP Semiconductors
Table 8.
74LV595_3
Product data sheet
Supply voltage
V
V
V
Fig 11. The master reset (MR) pulse width, the master reset to serial data output (Q7S) propagation delays and
Fig 12. Enable and disable times
CC
CC
CC
< 2.7 V
2.7 V
Measurement points are given in
V
the master reset to shift clock (SHCP) recovery time
Measurement points are given in
V
OL
OL
Measurement points
and V
and V
OH
OH
are typical output voltage drops that occur with the output load.
are typical output voltage drops that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
OFF-to-LOW
LOW-to-OFF
OE input
output
output
Input
V
0.5V
1.5 V
M
SH CP input
Q 7 S output
MR input
CC
GND
GND
Table
V
V
Table
V
CC
OH
OL
V
GND
GND
V
I
V
OH
OL
V
V
8.
8.
I
I
V
Rev. 03 — 21 April 2009
M
enabled
outputs
V
t
8-bit serial-in/serial-out or parallel-out shift register; 3-state
PLZ
Output
V
0.5V
1.5 V
t
M
PHZ
M
t
t
PHL
W
CC
V
X
V
V
t
M
Y
rec
V
M
disabled
outputs
V
V
V
t
X
OL
OL
PZL
t
PZH
0.1V
0.3 V
mna561
V
M
V
M
CC
001aae821
outputs
enabled
V
V
V
Y
OH
OH
© NXP B.V. 2009. All rights reserved.
74LV595
0.1V
0.3 V
CC
12 of 20