MC74ACT174DR2G ON Semiconductor, MC74ACT174DR2G Datasheet

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MC74ACT174DR2G

Manufacturer Part Number
MC74ACT174DR2G
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC74ACT174DR2G

Logic Family
ACT
Technology
CMOS
Number Of Bits
6
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
5V
Package Type
SOIC
Propagation Delay Time
11.5ns
Low Level Output Current
24mA
High Level Output Current
-24mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Lead Free Status / Rohs Status
Compliant
MC74AC174, MC74ACT174
Hex D Flip−Flop
with Master Reset
device is used primarily as a 6−bit edge−triggered storage register. The
information on the D inputs is transferred to storage during the
LOW−to−HIGH clock transition. The device has a Master Reset to
simultaneously clear all flip−flops.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 7
PIN ASSIGNMENT
TRUTH TABLE
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
PIN
D
CP
MR
Q
Figure 1. Pinout: 16−Lead Packages Conductors
MR
The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The
= LOW−to−HIGH Transition of Clock
Outputs Source/Sink 24 mA
′ACT174 Has TTL Compatible Inputs
0
0
H
H
H
L
−D
−Q
5
5
V
MR
16
CC
1
Inputs
CP
X
L
Q
Q
15
2
5
0
FUNCTION
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
D
X
H
X
L
D
14
D
3
5
0
(Top View)
D
13
D
4
Output
4
1
Q
Q
H
L
L
Q
Q
12
5
4
1
D
D
11
6
3
2
Q
Q
10
7
3
2
GND
CP
9
8
1
MC74AC174N
MC74ACT174N
MC74AC174D
MC74ACT174D
MC74AC174DR2
MC74ACT174DR2
MC74AC174DT
MC74ACT174DT
MC74AC174DTR2
MC74AC174M
MC74ACT174M
MC74AC174MEL
MC74ACT174MEL
See general marking information in the device marking
section on page 6 of this data sheet.
16
DEVICE MARKING INFORMATION
Device
ORDERING INFORMATION
1
16
16
16
http://onsemi.com
1
1
1
TSSOP−16
TSSOP−16
TSSOP−16
SOIC−16
SOIC−16
Package
SOIC−16
SOIC−16
EIAJ−16
EIAJ−16
EIAJ−16
EIAJ−16
PDIP−16
PDIP−16
Publication Order Number:
CASE 751B
CASE 948F
TSSOP−16
DT SUFFIX
CASE 648
M SUFFIX
CASE 966
N SUFFIX
D SUFFIX
EIAJ−16
DIP−16
SO−16
2500 Tape & Reel
2500 Tape & Reel
2500 Tape & Reel
2000 Tape & Reel
2000 Tape & Reel
MC74AC174/D
25 Units/Rail
25 Units/Rail
48 Units/Rail
48 Units/Rail
96 Units/Rail
96 Units/Rail
50 Units/Rail
50 Units/Rail
Shipping

Related parts for MC74ACT174DR2G

MC74ACT174DR2G Summary of contents

Page 1

MC74AC174, MC74ACT174 Hex D Flip−Flop with Master Reset The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the LOW−to−HIGH ...

Page 2

FUNCTIONAL DESCRIPTION The MC74AC174/74ACT174 edge−triggered D flip−flops with individual D inputs and Q outputs. The Clock (CP) and Master Reset (MR) are common to all flip−flops. Each D input’s state is transferred to the corresponding flip−flop’s output following the MR ...

Page 3

RECOMMENDED OPERATING CONDITIONS Symbol V Supply Voltage Input Voltage, Output Voltage (Ref. to GND) IN OUT Input Rise and Fall Time (Note ′AC Devices except Schmitt Inputs Input Rise ...

Page 4

... AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter Maximum Clock f max Frequency Propagation Delay t PLH Propagation Delay t PHL Propagation Delay t PHL *Voltage Range 3 3.3 V ±0.3 V. *Voltage Range 5 5.0 V ±0 OPERATING REQUIREMENTS Symbol ...

Page 5

... CC Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter Maximum Clock f max ...

Page 6

AC OPERATING REQUIREMENTS Symbol Parameter Setup Time, HIGH or LOW Hold Time, HIGH or LOW Pulse Width, LOW Pulse Width t w HIGH or ...

Page 7

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 PACKAGE DIMENSIONS PDIP−16 N ...

Page 8

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− SEATING D PLANE ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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