EVAL-ADE7752EB Analog Devices Inc, EVAL-ADE7752EB Datasheet - Page 3

• Manufacturer Part Number: EVAL-ADE7752EB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADE7752EB

• Lead Free Status / Rohs Status: Not Compliant

Voltage sense inputs
The voltage inputs connections on the ADE7752 evaluation
board can be directly connected to the line voltage sources.
The line voltages are attenuated using a simple resistor
divider network before it is presented to the ADE7752. The
attenuation network on the voltage channels is designed such
that the corner frequency (3dB frequency) of the network
matches that of the RC (anti-aliasing) filters on the current
channels inputs. This is important, because if they do not
match there will be large errors at low power factors. Figure
3 below shows how the attenuation network may be used with
trim pot.
The trim pot allows the signals on the voltage channels to be
scaled so as to calibrate the frequency on CF to some given
constant, e.g., 1600 imp/kWhr. This is especially appropri-
ate when calibrating the ADE7752. Some examples are given
later. Because of the relatively large signal on this channel
and the small dynamic range requirement, the voltage chan-
nels can be configured in a single-ended configuration.
Figure 3 shows a typical connection for the line voltage when
using the trim pot for calibration. In this case, R47, R44 and
R43 should be changed to 500Ω to assure the same cut-off
frequency of the anti-aliasing filter as for the current channel.
ADE7752 EVALUATION BOARD SET UP
ADE7752 EVALUATION BOARD SET UP
ADE7752 EVALUATION BOARD SET UP
Configuration
The ADE7752 evaluation board can be configurated for the different mode of operation of the ADE7752. The connection
of the 2 positions jumpers (Px) are described as Right or Left. This is defined when one looks at the board with the label
EVAL-ADE7752 at the front bottom left.
JUMPER
P3
P12
P14
P16
Other jumpers are present on the ADE7752 evaluation board. Their actions are described in the following table.
REV. PrB 06/02
ADE7752 EVALUATION BOARD SET UP
ADE7752 EVALUATION BOARD SET UP
PRELIMINARY TECHNICAL DATA
Left
S1=High
S0=Low
SCF=Low
= High
Right
S1=Low
S0=High
SCF=High
PRELIMINARY TECHNICAL DATA
= Low Left position: Pin 17 is connected to a pull up resistor
TABLE I : Configuration of ADE7752
DESCRIPTION
Right position: Pin17 is connected to a pull down resistor
Left position: Pin 22 is connected to a pull up resistor
Right position: Pin22 is connected to a pull down resistor
Left position: Pin21 is connected to a pull down resistor
Right position: Pin 21 is connected to a pull up resistor
Left position: Pin18 is connected to a pull down resistor
Right position: Pin 18 is connected to a pull up resistor
– 3 –
The maximum signal level permissible at VAP, VBP and
VCP is 0.5V peak for the ADE7752. Although the
ADE7752 analog inputs can withstand ±6V without risk
of permanent damage, the signal range should not
exceed ±0.5V with respect to AGND for the ADE7752
for specified operation.
Note that the analog input VN is connected to AGND via
the anti-alias filter R40/C1 using JP28. Jumper JP27
should be left open.
Figure 3 — Phase A Voltage Channel attenuation
100 - 250 V rms
P7 2
P7 1
JP38
network using Trim pot
499kΩ
R48
Attenuation
JP25
Network
JP28
499kΩ
R49
EVAL-ADE7752EB
JP3
JP27
R40
1kΩ
C4
33nF
JP36
500Ω
R47
C1
33nF
JP32
R3 500Ω
JP37
JP49
TP13
TP17
ADE7752
200 - 300 mV
rms
VN
VAP