BOXD845EBG2L Intel, BOXD845EBG2L Datasheet - Page 48

• Manufacturer Part Number: BOXD845EBG2L
• Manufacturer: Intel

Specifications of BOXD845EBG2L

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Intel Desktop Board D845EBG2/D845EPT2 Technical Product Specification
2.3 Fixed I/O Map
✏
48
Table 13.
Notes:
1.
2.
3.
Some additional I/O addresses are not available due to ICH4 address aliassing. The ICH4 data
sheet provides more information on address aliassing.
NOTE
0228 - 022F
04D0 - 04D1
Address (hex)
0000 - 00FF
0170 - 0177
01F0 - 01F7
0278 - 027F
02E8 - 02EF
02F8 - 02FF
0376
0377, bits 6:0
0378 - 037F
03B0 - 03BB
03C0 - 03DF
03E8 - 03EF
03F0 - 03F5
03F6
03F8 - 03FF
LPTn + 400
0CF8 - 0CFB
0CF9
0CFC - 0CFF
FFA0 - FFA7
FFA8 - FFAF
For information about
Obtaining the ICH4 data sheet
Default, but can be changed to another address range
Dword access only
Byte access only
(Note 3)
I/O Map
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 2)
Size
256 bytes
8 bytes
8 bytes
1 byte
7 bits
8 bytes
1 byte
2 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
12 bytes
32 bytes
8 bytes
6 bytes
8 bytes
4 bytes
1 byte
4 bytes
8 bytes
8 bytes
Description
Used by the Desktop Board D845EBG2/D845EPT2. Refer
to the ICH4 data sheet for dynamic addressing information.
Secondary IDE channel
Primary IDE channel
LPT3
LPT2
COM4/video (8514A)
COM2
Secondary IDE channel command port
Secondary IDE channel status port
LPT1
Intel 82845E MCH
Intel 82845E MCH
COM3
Diskette channel 1
Primary IDE channel command port
COM1
Edge/level triggered PIC
ECP port, LPTn base address + 400h
PCI configuration address register
Turbo and reset control register
PCI configuration data register
Primary bus master IDE registers
Secondary bus master IDE registers
Refer to
Section 1.3 on page 17