LAN9117-MT Standard Microsystems (SMSC), LAN9117-MT Datasheet - Page 76
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LAN9117-MT
Manufacturer Part Number
LAN9117-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9117-MT.pdf
(136 pages)
Specifications of LAN9117-MT
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9117-MT
Manufacturer:
Standard
Quantity:
5 375
Company:
Part Number:
LAN9117-MT
Manufacturer:
SMSC
Quantity:
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Part Number:
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SMSC
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Revision 1.5 (07-11-08)
12-11
BITS
2-0
10
9
8
7
6
5
4
3
Reserved
TX Data FIFO Overrun Interrupt (TDFO). Generated when the TX data
FIFO is full, and another write is attempted.
TX Data FIFO Available Interrupt (TDFA). Generated when the TX data
FIFO available space is greater than the programmed level.
TX Status FIFO Full Interrupt (TSFF). Generated when the TX Status
FIFO is full.
TX Status FIFO Level Interrupt (TSFL). Generated when the TX Status
FIFO reaches the programmed level.
RX Dropped Frame Interrupt (RXDF_INT). This interrupt is issued
whenever a receive frame is dropped.
Reserved
RX Status FIFO Full Interrupt (RSFF). Generated when the RX Status
FIFO is full.
RX Status FIFO Level Interrupt (RSFL). Generated when the RX Status
FIFO reaches the programmed level.
GPIO [2:0] (GPIOx_INT). Interrupts are generated from the GPIO’s.
These interrupts are configured through the GPIO_CFG register.
DESCRIPTION
DATASHEET
76
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
TYPE
RO
RO
SMSC LAN9117
DEFAULT
Datasheet
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0
0
0
0
0
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