LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 155

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LAN9303MI-AKZE

Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303MI-AKZE

Lead Free Status / Rohs Status
Compliant
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
13.2.2.2
31:22
21:16
BITS
15:6
5:0
RESERVED
GPIO Direction 5-0 (GPDIR[5:0])
These bits set the input/output direction of the GPIO pins.
0: GPIO pin is configured as an input
1: GPIO pin is configured as an output
RESERVED
GPIO Data 5-0 (GPIOD[5:0])
When a GPIO pin is enabled as an output, the value written to this field is
output on the corresponding GPIO pin. Upon a read, the value returned
depends on the current direction of the pin. If the pin is an input, the data
reflects the current state of the corresponding GPIO pin. If the pin is an
output, the data is the value that was last written into this register. The pin
direction is determined by the GPDIR bits of this register.
General Purpose I/O Data & Direction Register (GPIO_DATA_DIR)
This read/write register configures the direction of the GPIO pins and contains the GPIO input and
output data bits.
Offset:
1E4h
DESCRIPTION
DATASHEET
155
Size:
32 bits
TYPE
R/W
R/W
RO
RO
Revision 1.4 (07-07-10)
DEFAULT
0h
0h
-
-

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